1* AHCI SATA Controller
2
3SATA nodes are defined to describe on-chip Serial ATA controllers.
4Each SATA controller should have its own node.
5
6It is possible, but not required, to represent each port as a sub-node.
7It allows to enable each port independently when dealing with multiple
8PHYs.
9
10Required properties:
11- compatible        : compatible string, one of:
12  - "brcm,iproc-ahci"
13  - "hisilicon,hisi-ahci"
14  - "cavium,octeon-7130-ahci"
15  - "ibm,476gtr-ahci"
16  - "marvell,armada-380-ahci"
17  - "marvell,armada-3700-ahci"
18  - "snps,dwc-ahci"
19  - "snps,spear-ahci"
20  - "generic-ahci"
21- interrupts        : <interrupt mapping for SATA IRQ>
22- reg               : <registers mapping>
23
24Please note that when using "generic-ahci" you must also specify a SoC specific
25compatible:
26	compatible = "manufacturer,soc-model-ahci", "generic-ahci";
27
28Optional properties:
29- dma-coherent      : Present if dma operations are coherent
30- clocks            : a list of phandle + clock specifier pairs
31- resets            : a list of phandle + reset specifier pairs
32- target-supply     : regulator for SATA target power
33- phy-supply        : regulator for PHY power
34- phys              : reference to the SATA PHY node
35- phy-names         : must be "sata-phy"
36- ahci-supply       : regulator for AHCI controller
37- ports-implemented : Mask that indicates which ports that the HBA supports
38		      are available for software to use. Useful if PORTS_IMPL
39		      is not programmed by the BIOS, which is true with
40		      some embedded SOC's.
41
42Required properties when using sub-nodes:
43- #address-cells    : number of cells to encode an address
44- #size-cells       : number of cells representing the size of an address
45
46Sub-nodes required properties:
47- reg		    : the port number
48And at least one of the following properties:
49- phys		    : reference to the SATA PHY node
50- target-supply     : regulator for SATA target power
51
52Examples:
53        sata@ffe08000 {
54		compatible = "snps,spear-ahci";
55		reg = <0xffe08000 0x1000>;
56		interrupts = <115>;
57        };
58
59With sub-nodes:
60	sata@f7e90000 {
61		compatible = "marvell,berlin2q-achi", "generic-ahci";
62		reg = <0xe90000 0x1000>;
63		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
64		clocks = <&chip CLKID_SATA>;
65		#address-cells = <1>;
66		#size-cells = <0>;
67
68		sata0: sata-port@0 {
69			reg = <0>;
70			phys = <&sata_phy 0>;
71			target-supply = <&reg_sata0>;
72		};
73
74		sata1: sata-port@1 {
75			reg = <1>;
76			phys = <&sata_phy 1>;
77			target-supply = <&reg_sata1>;;
78		};
79	};
80