1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/cirrus,lochnagar.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Cirrus Logic Lochnagar Audio Development Board
8
9maintainers:
10  - patches@opensource.cirrus.com
11
12description: |
13  Lochnagar is an evaluation and development board for Cirrus Logic
14  Smart CODEC and Amp devices. It allows the connection of most Cirrus
15  Logic devices on mini-cards, as well as allowing connection of various
16  application processor systems to provide a full evaluation platform.
17  Audio system topology, clocking and power can all be controlled through
18  the Lochnagar, allowing the device under test to be used in a variety of
19  possible use cases.
20
21  This binding document describes the binding for the clock portion of the
22  driver.
23
24  Also see these documents for generic binding information:
25    [1] Clock : ../clock/clock-bindings.txt
26
27  And these for relevant defines:
28    [2] include/dt-bindings/clock/lochnagar.h
29
30  This binding must be part of the Lochnagar MFD binding:
31    [3] ../mfd/cirrus,lochnagar.yaml
32
33properties:
34  compatible:
35    enum:
36      - cirrus,lochnagar1-clk
37      - cirrus,lochnagar2-clk
38
39  '#clock-cells':
40    description:
41      The first cell indicates the clock number, see [2] for available
42      clocks and [1].
43    const: 1
44
45  clock-names:
46    items:
47      enum:
48        - ln-cdc-clkout # Output clock from CODEC card.
49        - ln-dsp-clkout # Output clock from DSP card.
50        - ln-gf-mclk1 # Optional input clock from host system.
51        - ln-gf-mclk2 # Optional input clock from host system.
52        - ln-gf-mclk3 # Optional input clock from host system.
53        - ln-gf-mclk4 # Optional input clock from host system.
54        - ln-psia1-mclk # Optional input clock from external connector.
55        - ln-psia2-mclk # Optional input clock from external connector.
56        - ln-spdif-mclk # Optional input clock from SPDIF.
57        - ln-spdif-clkout # Optional input clock from SPDIF.
58        - ln-adat-mclk # Optional input clock from ADAT.
59        - ln-pmic-32k # On board fixed clock.
60        - ln-clk-12m # On board fixed clock.
61        - ln-clk-11m # On board fixed clock.
62        - ln-clk-24m # On board fixed clock.
63        - ln-clk-22m # On board fixed clock.
64        - ln-clk-8m # On board fixed clock.
65        - ln-usb-clk-24m # On board fixed clock.
66        - ln-usb-clk-12m # On board fixed clock.
67    minItems: 1
68    maxItems: 19
69
70  clocks: true
71  assigned-clocks: true
72  assigned-clock-parents: true
73
74additionalProperties: false
75
76required:
77  - compatible
78  - '#clock-cells'
79