1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm A53 PLL clock
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11
12description:
13  The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for
14  frequencies above 1GHz.
15
16properties:
17  compatible:
18    enum:
19      - qcom,ipq5332-a53pll
20      - qcom,ipq6018-a53pll
21      - qcom,ipq8074-a53pll
22      - qcom,ipq9574-a73pll
23      - qcom,msm8916-a53pll
24      - qcom,msm8939-a53pll
25
26  reg:
27    maxItems: 1
28
29  '#clock-cells':
30    const: 0
31
32  clocks:
33    items:
34      - description: board XO clock
35
36  clock-names:
37    items:
38      - const: xo
39
40  operating-points-v2: true
41
42required:
43  - compatible
44  - reg
45  - '#clock-cells'
46
47additionalProperties: false
48
49examples:
50  # Example 1 - A53 PLL found on MSM8916 devices
51  - |
52    a53pll: clock@b016000 {
53        compatible = "qcom,msm8916-a53pll";
54        reg = <0xb016000 0x40>;
55        #clock-cells = <0>;
56    };
57  # Example 2 - A53 PLL found on IPQ6018 devices
58  - |
59    a53pll_ipq: clock-controller@b116000 {
60        compatible = "qcom,ipq6018-a53pll";
61        reg = <0x0b116000 0x40>;
62        #clock-cells = <0>;
63        clocks = <&xo>;
64        clock-names = "xo";
65    };
66