1* Renesas H8/300 divider clock
2
3Required Properties:
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5  - compatible: Must be "renesas,h8300-div-clock"
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7  - clocks: Reference to the parent clocks ("extal1" and "extal2")
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9  - #clock-cells: Must be 1
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11  - reg: Base address and length of the divide rate selector
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13  - renesas,width: bit width of selector
14
15Example
16-------
17
18		cclk: cclk {
19			compatible = "renesas,h8300-div-clock";
20			clocks = <&xclk>;
21			#clock-cells = <0>;
22			reg = <0xfee01b 2>;
23			renesas,width = <2>;
24		};
25