16be33864SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 26be33864SEmmanuel Vadot# Copyright 2019 NXP 36be33864SEmmanuel Vadot%YAML 1.2 46be33864SEmmanuel Vadot--- 5*fac71e4eSEmmanuel Vadot$id: http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml# 6*fac71e4eSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 76be33864SEmmanuel Vadot 86be33864SEmmanuel Vadottitle: iMX8MQ Display Controller Subsystem (DCSS) 96be33864SEmmanuel Vadot 106be33864SEmmanuel Vadotmaintainers: 116be33864SEmmanuel Vadot - Laurentiu Palcu <laurentiu.palcu@nxp.com> 126be33864SEmmanuel Vadot 136be33864SEmmanuel Vadotdescription: 146be33864SEmmanuel Vadot 156be33864SEmmanuel Vadot The DCSS (display controller sub system) is used to source up to three 166be33864SEmmanuel Vadot display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP 176be33864SEmmanuel Vadot 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10 186be33864SEmmanuel Vadot image processing capabilities are included to provide a solution capable of 196be33864SEmmanuel Vadot driving next generation high dynamic range displays. 206be33864SEmmanuel Vadot 216be33864SEmmanuel Vadotproperties: 226be33864SEmmanuel Vadot compatible: 236be33864SEmmanuel Vadot const: nxp,imx8mq-dcss 246be33864SEmmanuel Vadot 256be33864SEmmanuel Vadot reg: 266be33864SEmmanuel Vadot items: 276be33864SEmmanuel Vadot - description: DCSS base address and size, up to IRQ steer start 286be33864SEmmanuel Vadot - description: DCSS BLKCTL base address and size 296be33864SEmmanuel Vadot 306be33864SEmmanuel Vadot interrupts: 316be33864SEmmanuel Vadot items: 326be33864SEmmanuel Vadot - description: Context loader completion and error interrupt 336be33864SEmmanuel Vadot - description: DTG interrupt used to signal context loader trigger time 346be33864SEmmanuel Vadot - description: DTG interrupt for Vblank 356be33864SEmmanuel Vadot 366be33864SEmmanuel Vadot interrupt-names: 376be33864SEmmanuel Vadot items: 386be33864SEmmanuel Vadot - const: ctxld 396be33864SEmmanuel Vadot - const: ctxld_kick 406be33864SEmmanuel Vadot - const: vblank 416be33864SEmmanuel Vadot 426be33864SEmmanuel Vadot clocks: 436be33864SEmmanuel Vadot items: 446be33864SEmmanuel Vadot - description: Display APB clock for all peripheral PIO access interfaces 456be33864SEmmanuel Vadot - description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL 466be33864SEmmanuel Vadot - description: RTRAM clock 476be33864SEmmanuel Vadot - description: Pixel clock, can be driven either by HDMI phy clock or MIPI 486be33864SEmmanuel Vadot - description: DTRC clock, needed by video decompressor 496be33864SEmmanuel Vadot 506be33864SEmmanuel Vadot clock-names: 516be33864SEmmanuel Vadot items: 526be33864SEmmanuel Vadot - const: apb 536be33864SEmmanuel Vadot - const: axi 546be33864SEmmanuel Vadot - const: rtrm 556be33864SEmmanuel Vadot - const: pix 566be33864SEmmanuel Vadot - const: dtrc 576be33864SEmmanuel Vadot 586be33864SEmmanuel Vadot assigned-clocks: 596be33864SEmmanuel Vadot items: 606be33864SEmmanuel Vadot - description: Phandle and clock specifier of IMX8MQ_CLK_DISP_AXI_ROOT 616be33864SEmmanuel Vadot - description: Phandle and clock specifier of IMX8MQ_CLK_DISP_RTRM 626be33864SEmmanuel Vadot - description: Phandle and clock specifier of either IMX8MQ_VIDEO2_PLL1_REF_SEL or 636be33864SEmmanuel Vadot IMX8MQ_VIDEO_PLL1_REF_SEL 646be33864SEmmanuel Vadot 656be33864SEmmanuel Vadot assigned-clock-parents: 666be33864SEmmanuel Vadot items: 676be33864SEmmanuel Vadot - description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M 686be33864SEmmanuel Vadot - description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M 696be33864SEmmanuel Vadot - description: Phandle and clock specifier of IMX8MQ_CLK_27M 706be33864SEmmanuel Vadot 716be33864SEmmanuel Vadot assigned-clock-rates: 726be33864SEmmanuel Vadot items: 736be33864SEmmanuel Vadot - description: Must be 800 MHz 746be33864SEmmanuel Vadot - description: Must be 400 MHz 756be33864SEmmanuel Vadot 766be33864SEmmanuel Vadot port: 775def4c47SEmmanuel Vadot $ref: /schemas/graph.yaml#/properties/port 786be33864SEmmanuel Vadot description: 796be33864SEmmanuel Vadot A port node pointing to the input port of a HDMI/DP or MIPI display bridge. 806be33864SEmmanuel Vadot 816be33864SEmmanuel VadotadditionalProperties: false 826be33864SEmmanuel Vadot 836be33864SEmmanuel Vadotexamples: 846be33864SEmmanuel Vadot - | 856be33864SEmmanuel Vadot #include <dt-bindings/clock/imx8mq-clock.h> 866be33864SEmmanuel Vadot dcss: display-controller@32e00000 { 876be33864SEmmanuel Vadot compatible = "nxp,imx8mq-dcss"; 886be33864SEmmanuel Vadot reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; 896be33864SEmmanuel Vadot interrupts = <6>, <8>, <9>; 906be33864SEmmanuel Vadot interrupt-names = "ctxld", "ctxld_kick", "vblank"; 916be33864SEmmanuel Vadot interrupt-parent = <&irqsteer>; 926be33864SEmmanuel Vadot clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, <&clk IMX8MQ_CLK_DISP_AXI_ROOT>, 936be33864SEmmanuel Vadot <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, <&clk IMX8MQ_VIDEO2_PLL_OUT>, 946be33864SEmmanuel Vadot <&clk IMX8MQ_CLK_DISP_DTRC>; 956be33864SEmmanuel Vadot clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; 966be33864SEmmanuel Vadot assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, <&clk IMX8MQ_CLK_DISP_RTRM>, 976be33864SEmmanuel Vadot <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>; 986be33864SEmmanuel Vadot assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, <&clk IMX8MQ_SYS1_PLL_800M>, 996be33864SEmmanuel Vadot <&clk IMX8MQ_CLK_27M>; 1006be33864SEmmanuel Vadot assigned-clock-rates = <800000000>, 1016be33864SEmmanuel Vadot <400000000>; 1026be33864SEmmanuel Vadot port { 1036be33864SEmmanuel Vadot dcss_out: endpoint { 1046be33864SEmmanuel Vadot remote-endpoint = <&hdmi_in>; 1056be33864SEmmanuel Vadot }; 1066be33864SEmmanuel Vadot }; 1076be33864SEmmanuel Vadot }; 108