1c9ccf3a3SEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause 2c9ccf3a3SEmmanuel Vadot%YAML 1.2 3c9ccf3a3SEmmanuel Vadot--- 4c9ccf3a3SEmmanuel Vadot$id: http://devicetree.org/schemas/display/msm/dpu-qcm2290.yaml# 5c9ccf3a3SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6c9ccf3a3SEmmanuel Vadot 7c9ccf3a3SEmmanuel Vadottitle: Qualcomm Display DPU dt properties for QCM2290 target 8c9ccf3a3SEmmanuel Vadot 9c9ccf3a3SEmmanuel Vadotmaintainers: 10c9ccf3a3SEmmanuel Vadot - Loic Poulain <loic.poulain@linaro.org> 11c9ccf3a3SEmmanuel Vadot 12c9ccf3a3SEmmanuel Vadotdescription: | 13c9ccf3a3SEmmanuel Vadot Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 14c9ccf3a3SEmmanuel Vadot sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS 15c9ccf3a3SEmmanuel Vadot and DPU are mentioned for QCM2290 target. 16c9ccf3a3SEmmanuel Vadot 17c9ccf3a3SEmmanuel Vadotproperties: 18c9ccf3a3SEmmanuel Vadot compatible: 19c9ccf3a3SEmmanuel Vadot items: 20c9ccf3a3SEmmanuel Vadot - const: qcom,qcm2290-mdss 21c9ccf3a3SEmmanuel Vadot 22c9ccf3a3SEmmanuel Vadot reg: 23c9ccf3a3SEmmanuel Vadot maxItems: 1 24c9ccf3a3SEmmanuel Vadot 25c9ccf3a3SEmmanuel Vadot reg-names: 26c9ccf3a3SEmmanuel Vadot const: mdss 27c9ccf3a3SEmmanuel Vadot 28c9ccf3a3SEmmanuel Vadot power-domains: 29c9ccf3a3SEmmanuel Vadot maxItems: 1 30c9ccf3a3SEmmanuel Vadot 31c9ccf3a3SEmmanuel Vadot clocks: 32c9ccf3a3SEmmanuel Vadot items: 33c9ccf3a3SEmmanuel Vadot - description: Display AHB clock from gcc 34c9ccf3a3SEmmanuel Vadot - description: Display AXI clock 35c9ccf3a3SEmmanuel Vadot - description: Display core clock 36c9ccf3a3SEmmanuel Vadot 37c9ccf3a3SEmmanuel Vadot clock-names: 38c9ccf3a3SEmmanuel Vadot items: 39c9ccf3a3SEmmanuel Vadot - const: iface 40c9ccf3a3SEmmanuel Vadot - const: bus 41c9ccf3a3SEmmanuel Vadot - const: core 42c9ccf3a3SEmmanuel Vadot 43c9ccf3a3SEmmanuel Vadot interrupts: 44c9ccf3a3SEmmanuel Vadot maxItems: 1 45c9ccf3a3SEmmanuel Vadot 46c9ccf3a3SEmmanuel Vadot interrupt-controller: true 47c9ccf3a3SEmmanuel Vadot 48c9ccf3a3SEmmanuel Vadot "#address-cells": true 49c9ccf3a3SEmmanuel Vadot 50c9ccf3a3SEmmanuel Vadot "#size-cells": true 51c9ccf3a3SEmmanuel Vadot 52c9ccf3a3SEmmanuel Vadot "#interrupt-cells": 53c9ccf3a3SEmmanuel Vadot const: 1 54c9ccf3a3SEmmanuel Vadot 55c9ccf3a3SEmmanuel Vadot iommus: 56c9ccf3a3SEmmanuel Vadot items: 57c9ccf3a3SEmmanuel Vadot - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0 58c9ccf3a3SEmmanuel Vadot - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1 59c9ccf3a3SEmmanuel Vadot 60c9ccf3a3SEmmanuel Vadot ranges: true 61c9ccf3a3SEmmanuel Vadot 62c9ccf3a3SEmmanuel Vadot interconnects: 63c9ccf3a3SEmmanuel Vadot items: 64c9ccf3a3SEmmanuel Vadot - description: Interconnect path specifying the port ids for data bus 65c9ccf3a3SEmmanuel Vadot 66c9ccf3a3SEmmanuel Vadot interconnect-names: 67c9ccf3a3SEmmanuel Vadot const: mdp0-mem 68c9ccf3a3SEmmanuel Vadot 69d5b0e70fSEmmanuel Vadot resets: 70d5b0e70fSEmmanuel Vadot items: 71d5b0e70fSEmmanuel Vadot - description: MDSS_CORE reset 72d5b0e70fSEmmanuel Vadot 73c9ccf3a3SEmmanuel VadotpatternProperties: 74c9ccf3a3SEmmanuel Vadot "^display-controller@[0-9a-f]+$": 75c9ccf3a3SEmmanuel Vadot type: object 76c9ccf3a3SEmmanuel Vadot description: Node containing the properties of DPU. 77*7ef62cebSEmmanuel Vadot additionalProperties: false 78c9ccf3a3SEmmanuel Vadot 79c9ccf3a3SEmmanuel Vadot properties: 80c9ccf3a3SEmmanuel Vadot compatible: 81c9ccf3a3SEmmanuel Vadot items: 82c9ccf3a3SEmmanuel Vadot - const: qcom,qcm2290-dpu 83c9ccf3a3SEmmanuel Vadot 84c9ccf3a3SEmmanuel Vadot reg: 85c9ccf3a3SEmmanuel Vadot items: 86c9ccf3a3SEmmanuel Vadot - description: Address offset and size for mdp register set 87c9ccf3a3SEmmanuel Vadot - description: Address offset and size for vbif register set 88c9ccf3a3SEmmanuel Vadot 89c9ccf3a3SEmmanuel Vadot reg-names: 90c9ccf3a3SEmmanuel Vadot items: 91c9ccf3a3SEmmanuel Vadot - const: mdp 92c9ccf3a3SEmmanuel Vadot - const: vbif 93c9ccf3a3SEmmanuel Vadot 94c9ccf3a3SEmmanuel Vadot clocks: 95c9ccf3a3SEmmanuel Vadot items: 96c9ccf3a3SEmmanuel Vadot - description: Display AXI clock from gcc 97c9ccf3a3SEmmanuel Vadot - description: Display AHB clock from dispcc 98c9ccf3a3SEmmanuel Vadot - description: Display core clock from dispcc 99c9ccf3a3SEmmanuel Vadot - description: Display lut clock from dispcc 100c9ccf3a3SEmmanuel Vadot - description: Display vsync clock from dispcc 101c9ccf3a3SEmmanuel Vadot 102c9ccf3a3SEmmanuel Vadot clock-names: 103c9ccf3a3SEmmanuel Vadot items: 104c9ccf3a3SEmmanuel Vadot - const: bus 105c9ccf3a3SEmmanuel Vadot - const: iface 106c9ccf3a3SEmmanuel Vadot - const: core 107c9ccf3a3SEmmanuel Vadot - const: lut 108c9ccf3a3SEmmanuel Vadot - const: vsync 109c9ccf3a3SEmmanuel Vadot 110c9ccf3a3SEmmanuel Vadot interrupts: 111c9ccf3a3SEmmanuel Vadot maxItems: 1 112c9ccf3a3SEmmanuel Vadot 113c9ccf3a3SEmmanuel Vadot power-domains: 114c9ccf3a3SEmmanuel Vadot maxItems: 1 115c9ccf3a3SEmmanuel Vadot 116c9ccf3a3SEmmanuel Vadot operating-points-v2: true 117*7ef62cebSEmmanuel Vadot opp-table: 118*7ef62cebSEmmanuel Vadot type: object 119c9ccf3a3SEmmanuel Vadot 120c9ccf3a3SEmmanuel Vadot ports: 121c9ccf3a3SEmmanuel Vadot $ref: /schemas/graph.yaml#/properties/ports 122c9ccf3a3SEmmanuel Vadot description: | 123c9ccf3a3SEmmanuel Vadot Contains the list of output ports from DPU device. These ports 124c9ccf3a3SEmmanuel Vadot connect to interfaces that are external to the DPU hardware, 125c9ccf3a3SEmmanuel Vadot such as DSI. Each output port contains an endpoint that 126c9ccf3a3SEmmanuel Vadot describes how it is connected to an external interface. 127c9ccf3a3SEmmanuel Vadot 128c9ccf3a3SEmmanuel Vadot properties: 129c9ccf3a3SEmmanuel Vadot port@0: 130c9ccf3a3SEmmanuel Vadot $ref: /schemas/graph.yaml#/properties/port 131c9ccf3a3SEmmanuel Vadot description: DPU_INTF1 (DSI1) 132c9ccf3a3SEmmanuel Vadot 133c9ccf3a3SEmmanuel Vadot required: 134c9ccf3a3SEmmanuel Vadot - port@0 135c9ccf3a3SEmmanuel Vadot 136c9ccf3a3SEmmanuel Vadot required: 137c9ccf3a3SEmmanuel Vadot - compatible 138c9ccf3a3SEmmanuel Vadot - reg 139c9ccf3a3SEmmanuel Vadot - reg-names 140c9ccf3a3SEmmanuel Vadot - clocks 141c9ccf3a3SEmmanuel Vadot - interrupts 142c9ccf3a3SEmmanuel Vadot - power-domains 143c9ccf3a3SEmmanuel Vadot - operating-points-v2 144c9ccf3a3SEmmanuel Vadot - ports 145c9ccf3a3SEmmanuel Vadot 146c9ccf3a3SEmmanuel Vadotrequired: 147c9ccf3a3SEmmanuel Vadot - compatible 148c9ccf3a3SEmmanuel Vadot - reg 149c9ccf3a3SEmmanuel Vadot - reg-names 150c9ccf3a3SEmmanuel Vadot - power-domains 151c9ccf3a3SEmmanuel Vadot - clocks 152c9ccf3a3SEmmanuel Vadot - interrupts 153c9ccf3a3SEmmanuel Vadot - interrupt-controller 154c9ccf3a3SEmmanuel Vadot - iommus 155c9ccf3a3SEmmanuel Vadot - ranges 156c9ccf3a3SEmmanuel Vadot 157c9ccf3a3SEmmanuel VadotadditionalProperties: false 158c9ccf3a3SEmmanuel Vadot 159c9ccf3a3SEmmanuel Vadotexamples: 160c9ccf3a3SEmmanuel Vadot - | 161c9ccf3a3SEmmanuel Vadot #include <dt-bindings/clock/qcom,dispcc-qcm2290.h> 162c9ccf3a3SEmmanuel Vadot #include <dt-bindings/clock/qcom,gcc-qcm2290.h> 163c9ccf3a3SEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 164c9ccf3a3SEmmanuel Vadot #include <dt-bindings/interconnect/qcom,qcm2290.h> 165c9ccf3a3SEmmanuel Vadot #include <dt-bindings/power/qcom-rpmpd.h> 166c9ccf3a3SEmmanuel Vadot 167c9ccf3a3SEmmanuel Vadot mdss: mdss@5e00000 { 168c9ccf3a3SEmmanuel Vadot #address-cells = <1>; 169c9ccf3a3SEmmanuel Vadot #size-cells = <1>; 170c9ccf3a3SEmmanuel Vadot compatible = "qcom,qcm2290-mdss"; 171c9ccf3a3SEmmanuel Vadot reg = <0x05e00000 0x1000>; 172c9ccf3a3SEmmanuel Vadot reg-names = "mdss"; 173c9ccf3a3SEmmanuel Vadot power-domains = <&dispcc MDSS_GDSC>; 174c9ccf3a3SEmmanuel Vadot clocks = <&gcc GCC_DISP_AHB_CLK>, 175c9ccf3a3SEmmanuel Vadot <&gcc GCC_DISP_HF_AXI_CLK>, 176c9ccf3a3SEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_CLK>; 177c9ccf3a3SEmmanuel Vadot clock-names = "iface", "bus", "core"; 178c9ccf3a3SEmmanuel Vadot 179c9ccf3a3SEmmanuel Vadot interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 180c9ccf3a3SEmmanuel Vadot interrupt-controller; 181c9ccf3a3SEmmanuel Vadot #interrupt-cells = <1>; 182c9ccf3a3SEmmanuel Vadot 183c9ccf3a3SEmmanuel Vadot interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>; 184c9ccf3a3SEmmanuel Vadot interconnect-names = "mdp0-mem"; 185c9ccf3a3SEmmanuel Vadot 186c9ccf3a3SEmmanuel Vadot iommus = <&apps_smmu 0x420 0x2>, 187c9ccf3a3SEmmanuel Vadot <&apps_smmu 0x421 0x0>; 188c9ccf3a3SEmmanuel Vadot ranges; 189c9ccf3a3SEmmanuel Vadot 190c9ccf3a3SEmmanuel Vadot mdss_mdp: display-controller@5e01000 { 191c9ccf3a3SEmmanuel Vadot compatible = "qcom,qcm2290-dpu"; 192c9ccf3a3SEmmanuel Vadot reg = <0x05e01000 0x8f000>, 193c9ccf3a3SEmmanuel Vadot <0x05eb0000 0x2008>; 194c9ccf3a3SEmmanuel Vadot reg-names = "mdp", "vbif"; 195c9ccf3a3SEmmanuel Vadot 196c9ccf3a3SEmmanuel Vadot clocks = <&gcc GCC_DISP_HF_AXI_CLK>, 197c9ccf3a3SEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 198c9ccf3a3SEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_CLK>, 199c9ccf3a3SEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, 200c9ccf3a3SEmmanuel Vadot <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 201c9ccf3a3SEmmanuel Vadot clock-names = "bus", "iface", "core", "lut", "vsync"; 202c9ccf3a3SEmmanuel Vadot 203c9ccf3a3SEmmanuel Vadot operating-points-v2 = <&mdp_opp_table>; 204c9ccf3a3SEmmanuel Vadot power-domains = <&rpmpd QCM2290_VDDCX>; 205c9ccf3a3SEmmanuel Vadot 206c9ccf3a3SEmmanuel Vadot interrupt-parent = <&mdss>; 207c9ccf3a3SEmmanuel Vadot interrupts = <0>; 208c9ccf3a3SEmmanuel Vadot 209c9ccf3a3SEmmanuel Vadot ports { 210c9ccf3a3SEmmanuel Vadot #address-cells = <1>; 211c9ccf3a3SEmmanuel Vadot #size-cells = <0>; 212c9ccf3a3SEmmanuel Vadot 213c9ccf3a3SEmmanuel Vadot port@0 { 214c9ccf3a3SEmmanuel Vadot reg = <0>; 215c9ccf3a3SEmmanuel Vadot dpu_intf1_out: endpoint { 216c9ccf3a3SEmmanuel Vadot remote-endpoint = <&dsi0_in>; 217c9ccf3a3SEmmanuel Vadot }; 218c9ccf3a3SEmmanuel Vadot }; 219c9ccf3a3SEmmanuel Vadot }; 220c9ccf3a3SEmmanuel Vadot }; 221c9ccf3a3SEmmanuel Vadot }; 222c9ccf3a3SEmmanuel Vadot... 223