1*8d13bc63SEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*8d13bc63SEmmanuel Vadot%YAML 1.2 3*8d13bc63SEmmanuel Vadot--- 4*8d13bc63SEmmanuel Vadot$id: http://devicetree.org/schemas/display/msm/qcom,sdm670-mdss.yaml# 5*8d13bc63SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*8d13bc63SEmmanuel Vadot 7*8d13bc63SEmmanuel Vadottitle: Qualcomm SDM670 Display MDSS 8*8d13bc63SEmmanuel Vadot 9*8d13bc63SEmmanuel Vadotmaintainers: 10*8d13bc63SEmmanuel Vadot - Richard Acayan <mailingradian@gmail.com> 11*8d13bc63SEmmanuel Vadot 12*8d13bc63SEmmanuel Vadotdescription: 13*8d13bc63SEmmanuel Vadot SDM670 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 14*8d13bc63SEmmanuel Vadot like DPU display controller, DSI and DP interfaces etc. 15*8d13bc63SEmmanuel Vadot 16*8d13bc63SEmmanuel Vadot$ref: /schemas/display/msm/mdss-common.yaml# 17*8d13bc63SEmmanuel Vadot 18*8d13bc63SEmmanuel Vadotproperties: 19*8d13bc63SEmmanuel Vadot compatible: 20*8d13bc63SEmmanuel Vadot const: qcom,sdm670-mdss 21*8d13bc63SEmmanuel Vadot 22*8d13bc63SEmmanuel Vadot clocks: 23*8d13bc63SEmmanuel Vadot items: 24*8d13bc63SEmmanuel Vadot - description: Display AHB clock from gcc 25*8d13bc63SEmmanuel Vadot - description: Display core clock 26*8d13bc63SEmmanuel Vadot 27*8d13bc63SEmmanuel Vadot clock-names: 28*8d13bc63SEmmanuel Vadot items: 29*8d13bc63SEmmanuel Vadot - const: iface 30*8d13bc63SEmmanuel Vadot - const: core 31*8d13bc63SEmmanuel Vadot 32*8d13bc63SEmmanuel Vadot iommus: 33*8d13bc63SEmmanuel Vadot maxItems: 2 34*8d13bc63SEmmanuel Vadot 35*8d13bc63SEmmanuel Vadot interconnects: 36*8d13bc63SEmmanuel Vadot maxItems: 2 37*8d13bc63SEmmanuel Vadot 38*8d13bc63SEmmanuel Vadot interconnect-names: 39*8d13bc63SEmmanuel Vadot maxItems: 2 40*8d13bc63SEmmanuel Vadot 41*8d13bc63SEmmanuel VadotpatternProperties: 42*8d13bc63SEmmanuel Vadot "^display-controller@[0-9a-f]+$": 43*8d13bc63SEmmanuel Vadot type: object 44*8d13bc63SEmmanuel Vadot additionalProperties: true 45*8d13bc63SEmmanuel Vadot 46*8d13bc63SEmmanuel Vadot properties: 47*8d13bc63SEmmanuel Vadot compatible: 48*8d13bc63SEmmanuel Vadot const: qcom,sdm670-dpu 49*8d13bc63SEmmanuel Vadot 50*8d13bc63SEmmanuel Vadot "^displayport-controller@[0-9a-f]+$": 51*8d13bc63SEmmanuel Vadot type: object 52*8d13bc63SEmmanuel Vadot additionalProperties: true 53*8d13bc63SEmmanuel Vadot 54*8d13bc63SEmmanuel Vadot properties: 55*8d13bc63SEmmanuel Vadot compatible: 56*8d13bc63SEmmanuel Vadot const: qcom,sdm670-dp 57*8d13bc63SEmmanuel Vadot 58*8d13bc63SEmmanuel Vadot "^dsi@[0-9a-f]+$": 59*8d13bc63SEmmanuel Vadot type: object 60*8d13bc63SEmmanuel Vadot additionalProperties: true 61*8d13bc63SEmmanuel Vadot 62*8d13bc63SEmmanuel Vadot properties: 63*8d13bc63SEmmanuel Vadot compatible: 64*8d13bc63SEmmanuel Vadot contains: 65*8d13bc63SEmmanuel Vadot const: qcom,sdm670-dsi-ctrl 66*8d13bc63SEmmanuel Vadot 67*8d13bc63SEmmanuel Vadot "^phy@[0-9a-f]+$": 68*8d13bc63SEmmanuel Vadot type: object 69*8d13bc63SEmmanuel Vadot additionalProperties: true 70*8d13bc63SEmmanuel Vadot 71*8d13bc63SEmmanuel Vadot properties: 72*8d13bc63SEmmanuel Vadot compatible: 73*8d13bc63SEmmanuel Vadot const: qcom,dsi-phy-10nm 74*8d13bc63SEmmanuel Vadot 75*8d13bc63SEmmanuel Vadotrequired: 76*8d13bc63SEmmanuel Vadot - compatible 77*8d13bc63SEmmanuel Vadot 78*8d13bc63SEmmanuel VadotunevaluatedProperties: false 79*8d13bc63SEmmanuel Vadot 80*8d13bc63SEmmanuel Vadotexamples: 81*8d13bc63SEmmanuel Vadot - | 82*8d13bc63SEmmanuel Vadot #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 83*8d13bc63SEmmanuel Vadot #include <dt-bindings/clock/qcom,gcc-sdm845.h> 84*8d13bc63SEmmanuel Vadot #include <dt-bindings/clock/qcom,rpmh.h> 85*8d13bc63SEmmanuel Vadot #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h> 86*8d13bc63SEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 87*8d13bc63SEmmanuel Vadot #include <dt-bindings/power/qcom-rpmpd.h> 88*8d13bc63SEmmanuel Vadot 89*8d13bc63SEmmanuel Vadot display-subsystem@ae00000 { 90*8d13bc63SEmmanuel Vadot compatible = "qcom,sdm670-mdss"; 91*8d13bc63SEmmanuel Vadot reg = <0x0ae00000 0x1000>; 92*8d13bc63SEmmanuel Vadot reg-names = "mdss"; 93*8d13bc63SEmmanuel Vadot power-domains = <&dispcc MDSS_GDSC>; 94*8d13bc63SEmmanuel Vadot 95*8d13bc63SEmmanuel Vadot clocks = <&gcc GCC_DISP_AHB_CLK>, 96*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_CLK>; 97*8d13bc63SEmmanuel Vadot clock-names = "iface", "core"; 98*8d13bc63SEmmanuel Vadot 99*8d13bc63SEmmanuel Vadot interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 100*8d13bc63SEmmanuel Vadot interrupt-controller; 101*8d13bc63SEmmanuel Vadot #interrupt-cells = <1>; 102*8d13bc63SEmmanuel Vadot 103*8d13bc63SEmmanuel Vadot interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mem_noc SLAVE_EBI_CH0 0>, 104*8d13bc63SEmmanuel Vadot <&mmss_noc MASTER_MDP_PORT1 0 &mem_noc SLAVE_EBI_CH0 0>; 105*8d13bc63SEmmanuel Vadot interconnect-names = "mdp0-mem", "mdp1-mem"; 106*8d13bc63SEmmanuel Vadot 107*8d13bc63SEmmanuel Vadot iommus = <&apps_smmu 0x880 0x8>, 108*8d13bc63SEmmanuel Vadot <&apps_smmu 0xc80 0x8>; 109*8d13bc63SEmmanuel Vadot 110*8d13bc63SEmmanuel Vadot #address-cells = <1>; 111*8d13bc63SEmmanuel Vadot #size-cells = <1>; 112*8d13bc63SEmmanuel Vadot ranges; 113*8d13bc63SEmmanuel Vadot 114*8d13bc63SEmmanuel Vadot display-controller@ae01000 { 115*8d13bc63SEmmanuel Vadot compatible = "qcom,sdm670-dpu"; 116*8d13bc63SEmmanuel Vadot reg = <0x0ae01000 0x8f000>, 117*8d13bc63SEmmanuel Vadot <0x0aeb0000 0x2008>; 118*8d13bc63SEmmanuel Vadot reg-names = "mdp", "vbif"; 119*8d13bc63SEmmanuel Vadot 120*8d13bc63SEmmanuel Vadot clocks = <&gcc GCC_DISP_AXI_CLK>, 121*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 122*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_AXI_CLK>, 123*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_CLK>, 124*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 125*8d13bc63SEmmanuel Vadot clock-names = "gcc-bus", "iface", "bus", "core", "vsync"; 126*8d13bc63SEmmanuel Vadot 127*8d13bc63SEmmanuel Vadot interrupt-parent = <&mdss>; 128*8d13bc63SEmmanuel Vadot interrupts = <0>; 129*8d13bc63SEmmanuel Vadot power-domains = <&rpmhpd SDM670_CX>; 130*8d13bc63SEmmanuel Vadot operating-points-v2 = <&mdp_opp_table>; 131*8d13bc63SEmmanuel Vadot 132*8d13bc63SEmmanuel Vadot ports { 133*8d13bc63SEmmanuel Vadot #address-cells = <1>; 134*8d13bc63SEmmanuel Vadot #size-cells = <0>; 135*8d13bc63SEmmanuel Vadot 136*8d13bc63SEmmanuel Vadot port@0 { 137*8d13bc63SEmmanuel Vadot reg = <0>; 138*8d13bc63SEmmanuel Vadot dpu_intf1_out: endpoint { 139*8d13bc63SEmmanuel Vadot remote-endpoint = <&mdss_dsi0_in>; 140*8d13bc63SEmmanuel Vadot }; 141*8d13bc63SEmmanuel Vadot }; 142*8d13bc63SEmmanuel Vadot 143*8d13bc63SEmmanuel Vadot port@1 { 144*8d13bc63SEmmanuel Vadot reg = <1>; 145*8d13bc63SEmmanuel Vadot dpu_intf2_out: endpoint { 146*8d13bc63SEmmanuel Vadot remote-endpoint = <&mdss_dsi1_in>; 147*8d13bc63SEmmanuel Vadot }; 148*8d13bc63SEmmanuel Vadot }; 149*8d13bc63SEmmanuel Vadot }; 150*8d13bc63SEmmanuel Vadot }; 151*8d13bc63SEmmanuel Vadot 152*8d13bc63SEmmanuel Vadot dsi@ae94000 { 153*8d13bc63SEmmanuel Vadot compatible = "qcom,sdm670-dsi-ctrl", "qcom,mdss-dsi-ctrl"; 154*8d13bc63SEmmanuel Vadot reg = <0x0ae94000 0x400>; 155*8d13bc63SEmmanuel Vadot reg-names = "dsi_ctrl"; 156*8d13bc63SEmmanuel Vadot 157*8d13bc63SEmmanuel Vadot interrupt-parent = <&mdss>; 158*8d13bc63SEmmanuel Vadot interrupts = <4>; 159*8d13bc63SEmmanuel Vadot 160*8d13bc63SEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 161*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 162*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 163*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_ESC0_CLK>, 164*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 165*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_AXI_CLK>; 166*8d13bc63SEmmanuel Vadot clock-names = "byte", 167*8d13bc63SEmmanuel Vadot "byte_intf", 168*8d13bc63SEmmanuel Vadot "pixel", 169*8d13bc63SEmmanuel Vadot "core", 170*8d13bc63SEmmanuel Vadot "iface", 171*8d13bc63SEmmanuel Vadot "bus"; 172*8d13bc63SEmmanuel Vadot assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, 173*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; 174*8d13bc63SEmmanuel Vadot assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; 175*8d13bc63SEmmanuel Vadot 176*8d13bc63SEmmanuel Vadot operating-points-v2 = <&dsi_opp_table>; 177*8d13bc63SEmmanuel Vadot power-domains = <&rpmhpd SDM670_CX>; 178*8d13bc63SEmmanuel Vadot 179*8d13bc63SEmmanuel Vadot phys = <&mdss_dsi0_phy>; 180*8d13bc63SEmmanuel Vadot phy-names = "dsi"; 181*8d13bc63SEmmanuel Vadot 182*8d13bc63SEmmanuel Vadot #address-cells = <1>; 183*8d13bc63SEmmanuel Vadot #size-cells = <0>; 184*8d13bc63SEmmanuel Vadot 185*8d13bc63SEmmanuel Vadot ports { 186*8d13bc63SEmmanuel Vadot #address-cells = <1>; 187*8d13bc63SEmmanuel Vadot #size-cells = <0>; 188*8d13bc63SEmmanuel Vadot 189*8d13bc63SEmmanuel Vadot port@0 { 190*8d13bc63SEmmanuel Vadot reg = <0>; 191*8d13bc63SEmmanuel Vadot mdss_dsi0_in: endpoint { 192*8d13bc63SEmmanuel Vadot remote-endpoint = <&dpu_intf1_out>; 193*8d13bc63SEmmanuel Vadot }; 194*8d13bc63SEmmanuel Vadot }; 195*8d13bc63SEmmanuel Vadot 196*8d13bc63SEmmanuel Vadot port@1 { 197*8d13bc63SEmmanuel Vadot reg = <1>; 198*8d13bc63SEmmanuel Vadot mdss_dsi0_out: endpoint { 199*8d13bc63SEmmanuel Vadot }; 200*8d13bc63SEmmanuel Vadot }; 201*8d13bc63SEmmanuel Vadot }; 202*8d13bc63SEmmanuel Vadot }; 203*8d13bc63SEmmanuel Vadot 204*8d13bc63SEmmanuel Vadot mdss_dsi0_phy: phy@ae94400 { 205*8d13bc63SEmmanuel Vadot compatible = "qcom,dsi-phy-10nm"; 206*8d13bc63SEmmanuel Vadot reg = <0x0ae94400 0x200>, 207*8d13bc63SEmmanuel Vadot <0x0ae94600 0x280>, 208*8d13bc63SEmmanuel Vadot <0x0ae94a00 0x1e0>; 209*8d13bc63SEmmanuel Vadot reg-names = "dsi_phy", 210*8d13bc63SEmmanuel Vadot "dsi_phy_lane", 211*8d13bc63SEmmanuel Vadot "dsi_pll"; 212*8d13bc63SEmmanuel Vadot 213*8d13bc63SEmmanuel Vadot #clock-cells = <1>; 214*8d13bc63SEmmanuel Vadot #phy-cells = <0>; 215*8d13bc63SEmmanuel Vadot 216*8d13bc63SEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 217*8d13bc63SEmmanuel Vadot <&rpmhcc RPMH_CXO_CLK>; 218*8d13bc63SEmmanuel Vadot clock-names = "iface", "ref"; 219*8d13bc63SEmmanuel Vadot vdds-supply = <&vreg_dsi_phy>; 220*8d13bc63SEmmanuel Vadot }; 221*8d13bc63SEmmanuel Vadot 222*8d13bc63SEmmanuel Vadot dsi@ae96000 { 223*8d13bc63SEmmanuel Vadot compatible = "qcom,sdm670-dsi-ctrl", "qcom,mdss-dsi-ctrl"; 224*8d13bc63SEmmanuel Vadot reg = <0x0ae96000 0x400>; 225*8d13bc63SEmmanuel Vadot reg-names = "dsi_ctrl"; 226*8d13bc63SEmmanuel Vadot 227*8d13bc63SEmmanuel Vadot interrupt-parent = <&mdss>; 228*8d13bc63SEmmanuel Vadot interrupts = <5>; 229*8d13bc63SEmmanuel Vadot 230*8d13bc63SEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, 231*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, 232*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK1_CLK>, 233*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_ESC1_CLK>, 234*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 235*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_AXI_CLK>; 236*8d13bc63SEmmanuel Vadot clock-names = "byte", 237*8d13bc63SEmmanuel Vadot "byte_intf", 238*8d13bc63SEmmanuel Vadot "pixel", 239*8d13bc63SEmmanuel Vadot "core", 240*8d13bc63SEmmanuel Vadot "iface", 241*8d13bc63SEmmanuel Vadot "bus"; 242*8d13bc63SEmmanuel Vadot assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, 243*8d13bc63SEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; 244*8d13bc63SEmmanuel Vadot assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>; 245*8d13bc63SEmmanuel Vadot 246*8d13bc63SEmmanuel Vadot operating-points-v2 = <&dsi_opp_table>; 247*8d13bc63SEmmanuel Vadot power-domains = <&rpmhpd SDM670_CX>; 248*8d13bc63SEmmanuel Vadot 249*8d13bc63SEmmanuel Vadot phys = <&dsi1_phy>; 250*8d13bc63SEmmanuel Vadot phy-names = "dsi"; 251*8d13bc63SEmmanuel Vadot 252*8d13bc63SEmmanuel Vadot #address-cells = <1>; 253*8d13bc63SEmmanuel Vadot #size-cells = <0>; 254*8d13bc63SEmmanuel Vadot 255*8d13bc63SEmmanuel Vadot ports { 256*8d13bc63SEmmanuel Vadot #address-cells = <1>; 257*8d13bc63SEmmanuel Vadot #size-cells = <0>; 258*8d13bc63SEmmanuel Vadot 259*8d13bc63SEmmanuel Vadot port@0 { 260*8d13bc63SEmmanuel Vadot reg = <0>; 261*8d13bc63SEmmanuel Vadot mdss_dsi1_in: endpoint { 262*8d13bc63SEmmanuel Vadot remote-endpoint = <&dpu_intf2_out>; 263*8d13bc63SEmmanuel Vadot }; 264*8d13bc63SEmmanuel Vadot }; 265*8d13bc63SEmmanuel Vadot 266*8d13bc63SEmmanuel Vadot port@1 { 267*8d13bc63SEmmanuel Vadot reg = <1>; 268*8d13bc63SEmmanuel Vadot mdss_dsi1_out: endpoint { 269*8d13bc63SEmmanuel Vadot }; 270*8d13bc63SEmmanuel Vadot }; 271*8d13bc63SEmmanuel Vadot }; 272*8d13bc63SEmmanuel Vadot }; 273*8d13bc63SEmmanuel Vadot 274*8d13bc63SEmmanuel Vadot mdss_dsi1_phy: phy@ae96400 { 275*8d13bc63SEmmanuel Vadot compatible = "qcom,dsi-phy-10nm"; 276*8d13bc63SEmmanuel Vadot reg = <0x0ae96400 0x200>, 277*8d13bc63SEmmanuel Vadot <0x0ae96600 0x280>, 278*8d13bc63SEmmanuel Vadot <0x0ae96a00 0x10e>; 279*8d13bc63SEmmanuel Vadot reg-names = "dsi_phy", 280*8d13bc63SEmmanuel Vadot "dsi_phy_lane", 281*8d13bc63SEmmanuel Vadot "dsi_pll"; 282*8d13bc63SEmmanuel Vadot 283*8d13bc63SEmmanuel Vadot #clock-cells = <1>; 284*8d13bc63SEmmanuel Vadot #phy-cells = <0>; 285*8d13bc63SEmmanuel Vadot 286*8d13bc63SEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 287*8d13bc63SEmmanuel Vadot <&rpmhcc RPMH_CXO_CLK>; 288*8d13bc63SEmmanuel Vadot clock-names = "iface", "ref"; 289*8d13bc63SEmmanuel Vadot vdds-supply = <&vreg_dsi_phy>; 290*8d13bc63SEmmanuel Vadot }; 291*8d13bc63SEmmanuel Vadot }; 292*8d13bc63SEmmanuel Vadot... 293