1aa1a8ff2SEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 28bab661aSEmmanuel Vadot%YAML 1.2 38bab661aSEmmanuel Vadot--- 48bab661aSEmmanuel Vadot$id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mdss.yaml# 58bab661aSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 68bab661aSEmmanuel Vadot 78bab661aSEmmanuel Vadottitle: Qualcomm SDM845 Display MDSS 88bab661aSEmmanuel Vadot 98bab661aSEmmanuel Vadotmaintainers: 108bab661aSEmmanuel Vadot - Krishna Manikandan <quic_mkrishn@quicinc.com> 118bab661aSEmmanuel Vadot 128bab661aSEmmanuel Vadotdescription: 138bab661aSEmmanuel Vadot Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 148bab661aSEmmanuel Vadot sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 158bab661aSEmmanuel Vadot bindings of MDSS are mentioned for SDM845 target. 168bab661aSEmmanuel Vadot 178bab661aSEmmanuel Vadot$ref: /schemas/display/msm/mdss-common.yaml# 188bab661aSEmmanuel Vadot 198bab661aSEmmanuel Vadotproperties: 208bab661aSEmmanuel Vadot compatible: 21cb7aa33aSEmmanuel Vadot const: qcom,sdm845-mdss 228bab661aSEmmanuel Vadot 238bab661aSEmmanuel Vadot clocks: 248bab661aSEmmanuel Vadot items: 258bab661aSEmmanuel Vadot - description: Display AHB clock from gcc 268bab661aSEmmanuel Vadot - description: Display core clock 278bab661aSEmmanuel Vadot 288bab661aSEmmanuel Vadot clock-names: 298bab661aSEmmanuel Vadot items: 308bab661aSEmmanuel Vadot - const: iface 318bab661aSEmmanuel Vadot - const: core 328bab661aSEmmanuel Vadot 338bab661aSEmmanuel Vadot iommus: 348bab661aSEmmanuel Vadot maxItems: 2 358bab661aSEmmanuel Vadot 368bab661aSEmmanuel Vadot interconnects: 378bab661aSEmmanuel Vadot maxItems: 2 388bab661aSEmmanuel Vadot 398bab661aSEmmanuel Vadot interconnect-names: 408bab661aSEmmanuel Vadot maxItems: 2 418bab661aSEmmanuel Vadot 428bab661aSEmmanuel VadotpatternProperties: 438bab661aSEmmanuel Vadot "^display-controller@[0-9a-f]+$": 448bab661aSEmmanuel Vadot type: object 45*84943d6fSEmmanuel Vadot additionalProperties: true 46*84943d6fSEmmanuel Vadot 478bab661aSEmmanuel Vadot properties: 488bab661aSEmmanuel Vadot compatible: 498bab661aSEmmanuel Vadot const: qcom,sdm845-dpu 508bab661aSEmmanuel Vadot 51cb7aa33aSEmmanuel Vadot "^displayport-controller@[0-9a-f]+$": 52cb7aa33aSEmmanuel Vadot type: object 53*84943d6fSEmmanuel Vadot additionalProperties: true 54*84943d6fSEmmanuel Vadot 55cb7aa33aSEmmanuel Vadot properties: 56cb7aa33aSEmmanuel Vadot compatible: 57cb7aa33aSEmmanuel Vadot const: qcom,sdm845-dp 58cb7aa33aSEmmanuel Vadot 598bab661aSEmmanuel Vadot "^dsi@[0-9a-f]+$": 608bab661aSEmmanuel Vadot type: object 61*84943d6fSEmmanuel Vadot additionalProperties: true 62*84943d6fSEmmanuel Vadot 638bab661aSEmmanuel Vadot properties: 648bab661aSEmmanuel Vadot compatible: 65cb7aa33aSEmmanuel Vadot items: 66cb7aa33aSEmmanuel Vadot - const: qcom,sdm845-dsi-ctrl 67cb7aa33aSEmmanuel Vadot - const: qcom,mdss-dsi-ctrl 688bab661aSEmmanuel Vadot 698bab661aSEmmanuel Vadot "^phy@[0-9a-f]+$": 708bab661aSEmmanuel Vadot type: object 71*84943d6fSEmmanuel Vadot additionalProperties: true 72*84943d6fSEmmanuel Vadot 738bab661aSEmmanuel Vadot properties: 748bab661aSEmmanuel Vadot compatible: 758bab661aSEmmanuel Vadot const: qcom,dsi-phy-10nm 768bab661aSEmmanuel Vadot 77cb7aa33aSEmmanuel Vadotrequired: 78cb7aa33aSEmmanuel Vadot - compatible 79cb7aa33aSEmmanuel Vadot 808bab661aSEmmanuel VadotunevaluatedProperties: false 818bab661aSEmmanuel Vadot 828bab661aSEmmanuel Vadotexamples: 838bab661aSEmmanuel Vadot - | 848bab661aSEmmanuel Vadot #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 858bab661aSEmmanuel Vadot #include <dt-bindings/clock/qcom,gcc-sdm845.h> 868bab661aSEmmanuel Vadot #include <dt-bindings/clock/qcom,rpmh.h> 878bab661aSEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 888bab661aSEmmanuel Vadot #include <dt-bindings/power/qcom-rpmpd.h> 898bab661aSEmmanuel Vadot 908bab661aSEmmanuel Vadot display-subsystem@ae00000 { 918bab661aSEmmanuel Vadot #address-cells = <1>; 928bab661aSEmmanuel Vadot #size-cells = <1>; 938bab661aSEmmanuel Vadot compatible = "qcom,sdm845-mdss"; 948bab661aSEmmanuel Vadot reg = <0x0ae00000 0x1000>; 958bab661aSEmmanuel Vadot reg-names = "mdss"; 968bab661aSEmmanuel Vadot power-domains = <&dispcc MDSS_GDSC>; 978bab661aSEmmanuel Vadot 988bab661aSEmmanuel Vadot clocks = <&gcc GCC_DISP_AHB_CLK>, 998bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_CLK>; 1008bab661aSEmmanuel Vadot clock-names = "iface", "core"; 1018bab661aSEmmanuel Vadot 1028bab661aSEmmanuel Vadot interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 1038bab661aSEmmanuel Vadot interrupt-controller; 1048bab661aSEmmanuel Vadot #interrupt-cells = <1>; 1058bab661aSEmmanuel Vadot 1068bab661aSEmmanuel Vadot iommus = <&apps_smmu 0x880 0x8>, 1078bab661aSEmmanuel Vadot <&apps_smmu 0xc80 0x8>; 1088bab661aSEmmanuel Vadot ranges; 1098bab661aSEmmanuel Vadot 1108bab661aSEmmanuel Vadot display-controller@ae01000 { 1118bab661aSEmmanuel Vadot compatible = "qcom,sdm845-dpu"; 1128bab661aSEmmanuel Vadot reg = <0x0ae01000 0x8f000>, 1138bab661aSEmmanuel Vadot <0x0aeb0000 0x2008>; 1148bab661aSEmmanuel Vadot reg-names = "mdp", "vbif"; 1158bab661aSEmmanuel Vadot 1168bab661aSEmmanuel Vadot clocks = <&gcc GCC_DISP_AXI_CLK>, 1178bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 1188bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_AXI_CLK>, 1198bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_CLK>, 1208bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 1218bab661aSEmmanuel Vadot clock-names = "gcc-bus", "iface", "bus", "core", "vsync"; 1228bab661aSEmmanuel Vadot 1238bab661aSEmmanuel Vadot interrupt-parent = <&mdss>; 1248bab661aSEmmanuel Vadot interrupts = <0>; 1258bab661aSEmmanuel Vadot power-domains = <&rpmhpd SDM845_CX>; 1268bab661aSEmmanuel Vadot operating-points-v2 = <&mdp_opp_table>; 1278bab661aSEmmanuel Vadot 1288bab661aSEmmanuel Vadot ports { 1298bab661aSEmmanuel Vadot #address-cells = <1>; 1308bab661aSEmmanuel Vadot #size-cells = <0>; 1318bab661aSEmmanuel Vadot 1328bab661aSEmmanuel Vadot port@0 { 1338bab661aSEmmanuel Vadot reg = <0>; 1348bab661aSEmmanuel Vadot dpu_intf1_out: endpoint { 1358bab661aSEmmanuel Vadot remote-endpoint = <&dsi0_in>; 1368bab661aSEmmanuel Vadot }; 1378bab661aSEmmanuel Vadot }; 1388bab661aSEmmanuel Vadot 1398bab661aSEmmanuel Vadot port@1 { 1408bab661aSEmmanuel Vadot reg = <1>; 1418bab661aSEmmanuel Vadot dpu_intf2_out: endpoint { 1428bab661aSEmmanuel Vadot remote-endpoint = <&dsi1_in>; 1438bab661aSEmmanuel Vadot }; 1448bab661aSEmmanuel Vadot }; 1458bab661aSEmmanuel Vadot }; 1468bab661aSEmmanuel Vadot }; 1478bab661aSEmmanuel Vadot 1488bab661aSEmmanuel Vadot dsi@ae94000 { 149cb7aa33aSEmmanuel Vadot compatible = "qcom,sdm845-dsi-ctrl", "qcom,mdss-dsi-ctrl"; 1508bab661aSEmmanuel Vadot reg = <0x0ae94000 0x400>; 1518bab661aSEmmanuel Vadot reg-names = "dsi_ctrl"; 1528bab661aSEmmanuel Vadot 1538bab661aSEmmanuel Vadot interrupt-parent = <&mdss>; 1548bab661aSEmmanuel Vadot interrupts = <4>; 1558bab661aSEmmanuel Vadot 1568bab661aSEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 1578bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 1588bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 1598bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_ESC0_CLK>, 1608bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 1618bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_AXI_CLK>; 1628bab661aSEmmanuel Vadot clock-names = "byte", 1638bab661aSEmmanuel Vadot "byte_intf", 1648bab661aSEmmanuel Vadot "pixel", 1658bab661aSEmmanuel Vadot "core", 1668bab661aSEmmanuel Vadot "iface", 1678bab661aSEmmanuel Vadot "bus"; 1688bab661aSEmmanuel Vadot assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, 1698bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; 1708bab661aSEmmanuel Vadot assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; 1718bab661aSEmmanuel Vadot 1728bab661aSEmmanuel Vadot operating-points-v2 = <&dsi_opp_table>; 1738bab661aSEmmanuel Vadot power-domains = <&rpmhpd SDM845_CX>; 1748bab661aSEmmanuel Vadot 1758bab661aSEmmanuel Vadot phys = <&dsi0_phy>; 1768bab661aSEmmanuel Vadot phy-names = "dsi"; 1778bab661aSEmmanuel Vadot 1788bab661aSEmmanuel Vadot #address-cells = <1>; 1798bab661aSEmmanuel Vadot #size-cells = <0>; 1808bab661aSEmmanuel Vadot 1818bab661aSEmmanuel Vadot ports { 1828bab661aSEmmanuel Vadot #address-cells = <1>; 1838bab661aSEmmanuel Vadot #size-cells = <0>; 1848bab661aSEmmanuel Vadot 1858bab661aSEmmanuel Vadot port@0 { 1868bab661aSEmmanuel Vadot reg = <0>; 1878bab661aSEmmanuel Vadot dsi0_in: endpoint { 1888bab661aSEmmanuel Vadot remote-endpoint = <&dpu_intf1_out>; 1898bab661aSEmmanuel Vadot }; 1908bab661aSEmmanuel Vadot }; 1918bab661aSEmmanuel Vadot 1928bab661aSEmmanuel Vadot port@1 { 1938bab661aSEmmanuel Vadot reg = <1>; 1948bab661aSEmmanuel Vadot dsi0_out: endpoint { 1958bab661aSEmmanuel Vadot }; 1968bab661aSEmmanuel Vadot }; 1978bab661aSEmmanuel Vadot }; 1988bab661aSEmmanuel Vadot }; 1998bab661aSEmmanuel Vadot 2008bab661aSEmmanuel Vadot dsi0_phy: phy@ae94400 { 2018bab661aSEmmanuel Vadot compatible = "qcom,dsi-phy-10nm"; 2028bab661aSEmmanuel Vadot reg = <0x0ae94400 0x200>, 2038bab661aSEmmanuel Vadot <0x0ae94600 0x280>, 2048bab661aSEmmanuel Vadot <0x0ae94a00 0x1e0>; 2058bab661aSEmmanuel Vadot reg-names = "dsi_phy", 2068bab661aSEmmanuel Vadot "dsi_phy_lane", 2078bab661aSEmmanuel Vadot "dsi_pll"; 2088bab661aSEmmanuel Vadot 2098bab661aSEmmanuel Vadot #clock-cells = <1>; 2108bab661aSEmmanuel Vadot #phy-cells = <0>; 2118bab661aSEmmanuel Vadot 2128bab661aSEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 2138bab661aSEmmanuel Vadot <&rpmhcc RPMH_CXO_CLK>; 2148bab661aSEmmanuel Vadot clock-names = "iface", "ref"; 2158bab661aSEmmanuel Vadot vdds-supply = <&vreg_dsi_phy>; 2168bab661aSEmmanuel Vadot }; 2178bab661aSEmmanuel Vadot 2188bab661aSEmmanuel Vadot dsi@ae96000 { 219cb7aa33aSEmmanuel Vadot compatible = "qcom,sdm845-dsi-ctrl", "qcom,mdss-dsi-ctrl"; 2208bab661aSEmmanuel Vadot reg = <0x0ae96000 0x400>; 2218bab661aSEmmanuel Vadot reg-names = "dsi_ctrl"; 2228bab661aSEmmanuel Vadot 2238bab661aSEmmanuel Vadot interrupt-parent = <&mdss>; 2248bab661aSEmmanuel Vadot interrupts = <5>; 2258bab661aSEmmanuel Vadot 2268bab661aSEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, 2278bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, 2288bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK1_CLK>, 2298bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_ESC1_CLK>, 2308bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 2318bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_AXI_CLK>; 2328bab661aSEmmanuel Vadot clock-names = "byte", 2338bab661aSEmmanuel Vadot "byte_intf", 2348bab661aSEmmanuel Vadot "pixel", 2358bab661aSEmmanuel Vadot "core", 2368bab661aSEmmanuel Vadot "iface", 2378bab661aSEmmanuel Vadot "bus"; 2388bab661aSEmmanuel Vadot assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, 2398bab661aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; 2408bab661aSEmmanuel Vadot assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>; 2418bab661aSEmmanuel Vadot 2428bab661aSEmmanuel Vadot operating-points-v2 = <&dsi_opp_table>; 2438bab661aSEmmanuel Vadot power-domains = <&rpmhpd SDM845_CX>; 2448bab661aSEmmanuel Vadot 2458bab661aSEmmanuel Vadot phys = <&dsi1_phy>; 2468bab661aSEmmanuel Vadot phy-names = "dsi"; 2478bab661aSEmmanuel Vadot 2488bab661aSEmmanuel Vadot #address-cells = <1>; 2498bab661aSEmmanuel Vadot #size-cells = <0>; 2508bab661aSEmmanuel Vadot 2518bab661aSEmmanuel Vadot ports { 2528bab661aSEmmanuel Vadot #address-cells = <1>; 2538bab661aSEmmanuel Vadot #size-cells = <0>; 2548bab661aSEmmanuel Vadot 2558bab661aSEmmanuel Vadot port@0 { 2568bab661aSEmmanuel Vadot reg = <0>; 2578bab661aSEmmanuel Vadot dsi1_in: endpoint { 2588bab661aSEmmanuel Vadot remote-endpoint = <&dpu_intf2_out>; 2598bab661aSEmmanuel Vadot }; 2608bab661aSEmmanuel Vadot }; 2618bab661aSEmmanuel Vadot 2628bab661aSEmmanuel Vadot port@1 { 2638bab661aSEmmanuel Vadot reg = <1>; 2648bab661aSEmmanuel Vadot dsi1_out: endpoint { 2658bab661aSEmmanuel Vadot }; 2668bab661aSEmmanuel Vadot }; 2678bab661aSEmmanuel Vadot }; 2688bab661aSEmmanuel Vadot }; 2698bab661aSEmmanuel Vadot 2708bab661aSEmmanuel Vadot dsi1_phy: phy@ae96400 { 2718bab661aSEmmanuel Vadot compatible = "qcom,dsi-phy-10nm"; 2728bab661aSEmmanuel Vadot reg = <0x0ae96400 0x200>, 2738bab661aSEmmanuel Vadot <0x0ae96600 0x280>, 2748bab661aSEmmanuel Vadot <0x0ae96a00 0x10e>; 2758bab661aSEmmanuel Vadot reg-names = "dsi_phy", 2768bab661aSEmmanuel Vadot "dsi_phy_lane", 2778bab661aSEmmanuel Vadot "dsi_pll"; 2788bab661aSEmmanuel Vadot 2798bab661aSEmmanuel Vadot #clock-cells = <1>; 2808bab661aSEmmanuel Vadot #phy-cells = <0>; 2818bab661aSEmmanuel Vadot 2828bab661aSEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 2838bab661aSEmmanuel Vadot <&rpmhcc RPMH_CXO_CLK>; 2848bab661aSEmmanuel Vadot clock-names = "iface", "ref"; 2858bab661aSEmmanuel Vadot vdds-supply = <&vreg_dsi_phy>; 2868bab661aSEmmanuel Vadot }; 2878bab661aSEmmanuel Vadot }; 2888bab661aSEmmanuel Vadot... 289