1aa1a8ff2SEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2aa1a8ff2SEmmanuel Vadot%YAML 1.2 3aa1a8ff2SEmmanuel Vadot--- 4aa1a8ff2SEmmanuel Vadot$id: http://devicetree.org/schemas/display/msm/qcom,sm6125-mdss.yaml# 5aa1a8ff2SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6aa1a8ff2SEmmanuel Vadot 7aa1a8ff2SEmmanuel Vadottitle: Qualcomm SM6125 Display MDSS 8aa1a8ff2SEmmanuel Vadot 9aa1a8ff2SEmmanuel Vadotmaintainers: 10aa1a8ff2SEmmanuel Vadot - Marijn Suijten <marijn.suijten@somainline.org> 11aa1a8ff2SEmmanuel Vadot 12aa1a8ff2SEmmanuel Vadotdescription: 13aa1a8ff2SEmmanuel Vadot SM6125 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 14aa1a8ff2SEmmanuel Vadot like DPU display controller, DSI and DP interfaces etc. 15aa1a8ff2SEmmanuel Vadot 16aa1a8ff2SEmmanuel Vadot$ref: /schemas/display/msm/mdss-common.yaml# 17aa1a8ff2SEmmanuel Vadot 18aa1a8ff2SEmmanuel Vadotproperties: 19aa1a8ff2SEmmanuel Vadot compatible: 20aa1a8ff2SEmmanuel Vadot const: qcom,sm6125-mdss 21aa1a8ff2SEmmanuel Vadot 22aa1a8ff2SEmmanuel Vadot clocks: 23aa1a8ff2SEmmanuel Vadot items: 24aa1a8ff2SEmmanuel Vadot - description: Display AHB clock from gcc 25aa1a8ff2SEmmanuel Vadot - description: Display AHB clock 26aa1a8ff2SEmmanuel Vadot - description: Display core clock 27aa1a8ff2SEmmanuel Vadot 28aa1a8ff2SEmmanuel Vadot clock-names: 29aa1a8ff2SEmmanuel Vadot items: 30aa1a8ff2SEmmanuel Vadot - const: iface 31aa1a8ff2SEmmanuel Vadot - const: ahb 32aa1a8ff2SEmmanuel Vadot - const: core 33aa1a8ff2SEmmanuel Vadot 34aa1a8ff2SEmmanuel Vadot iommus: 35aa1a8ff2SEmmanuel Vadot maxItems: 1 36aa1a8ff2SEmmanuel Vadot 37aa1a8ff2SEmmanuel Vadot interconnects: 38*8d13bc63SEmmanuel Vadot items: 39*8d13bc63SEmmanuel Vadot - description: Interconnect path from mdp0 port to the data bus 40*8d13bc63SEmmanuel Vadot - description: Interconnect path from CPU to the reg bus 41aa1a8ff2SEmmanuel Vadot 42aa1a8ff2SEmmanuel Vadot interconnect-names: 43*8d13bc63SEmmanuel Vadot items: 44*8d13bc63SEmmanuel Vadot - const: mdp0-mem 45*8d13bc63SEmmanuel Vadot - const: cpu-cfg 46aa1a8ff2SEmmanuel Vadot 47aa1a8ff2SEmmanuel VadotpatternProperties: 48aa1a8ff2SEmmanuel Vadot "^display-controller@[0-9a-f]+$": 49aa1a8ff2SEmmanuel Vadot type: object 5084943d6fSEmmanuel Vadot additionalProperties: true 5184943d6fSEmmanuel Vadot 52aa1a8ff2SEmmanuel Vadot properties: 53aa1a8ff2SEmmanuel Vadot compatible: 54aa1a8ff2SEmmanuel Vadot const: qcom,sm6125-dpu 55aa1a8ff2SEmmanuel Vadot 56aa1a8ff2SEmmanuel Vadot "^dsi@[0-9a-f]+$": 57aa1a8ff2SEmmanuel Vadot type: object 5884943d6fSEmmanuel Vadot additionalProperties: true 5984943d6fSEmmanuel Vadot 60aa1a8ff2SEmmanuel Vadot properties: 61aa1a8ff2SEmmanuel Vadot compatible: 62aa1a8ff2SEmmanuel Vadot items: 63aa1a8ff2SEmmanuel Vadot - const: qcom,sm6125-dsi-ctrl 64aa1a8ff2SEmmanuel Vadot - const: qcom,mdss-dsi-ctrl 65aa1a8ff2SEmmanuel Vadot 66aa1a8ff2SEmmanuel Vadot "^phy@[0-9a-f]+$": 67aa1a8ff2SEmmanuel Vadot type: object 6884943d6fSEmmanuel Vadot additionalProperties: true 6984943d6fSEmmanuel Vadot 70aa1a8ff2SEmmanuel Vadot properties: 71aa1a8ff2SEmmanuel Vadot compatible: 72aa1a8ff2SEmmanuel Vadot const: qcom,sm6125-dsi-phy-14nm 73aa1a8ff2SEmmanuel Vadot 74aa1a8ff2SEmmanuel VadotunevaluatedProperties: false 75aa1a8ff2SEmmanuel Vadot 76aa1a8ff2SEmmanuel Vadotexamples: 77aa1a8ff2SEmmanuel Vadot - | 78aa1a8ff2SEmmanuel Vadot #include <dt-bindings/clock/qcom,dispcc-sm6125.h> 79aa1a8ff2SEmmanuel Vadot #include <dt-bindings/clock/qcom,gcc-sm6125.h> 80aa1a8ff2SEmmanuel Vadot #include <dt-bindings/clock/qcom,rpmcc.h> 81aa1a8ff2SEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 82aa1a8ff2SEmmanuel Vadot #include <dt-bindings/power/qcom-rpmpd.h> 83aa1a8ff2SEmmanuel Vadot 84aa1a8ff2SEmmanuel Vadot display-subsystem@5e00000 { 85aa1a8ff2SEmmanuel Vadot compatible = "qcom,sm6125-mdss"; 86aa1a8ff2SEmmanuel Vadot reg = <0x05e00000 0x1000>; 87aa1a8ff2SEmmanuel Vadot reg-names = "mdss"; 88aa1a8ff2SEmmanuel Vadot 89aa1a8ff2SEmmanuel Vadot interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 90aa1a8ff2SEmmanuel Vadot interrupt-controller; 91aa1a8ff2SEmmanuel Vadot #interrupt-cells = <1>; 92aa1a8ff2SEmmanuel Vadot 93aa1a8ff2SEmmanuel Vadot clocks = <&gcc GCC_DISP_AHB_CLK>, 94aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 95aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_CLK>; 96aa1a8ff2SEmmanuel Vadot clock-names = "iface", 97aa1a8ff2SEmmanuel Vadot "ahb", 98aa1a8ff2SEmmanuel Vadot "core"; 99aa1a8ff2SEmmanuel Vadot 100aa1a8ff2SEmmanuel Vadot power-domains = <&dispcc MDSS_GDSC>; 101aa1a8ff2SEmmanuel Vadot 102aa1a8ff2SEmmanuel Vadot iommus = <&apps_smmu 0x400 0x0>; 103aa1a8ff2SEmmanuel Vadot 104aa1a8ff2SEmmanuel Vadot #address-cells = <1>; 105aa1a8ff2SEmmanuel Vadot #size-cells = <1>; 106aa1a8ff2SEmmanuel Vadot ranges; 107aa1a8ff2SEmmanuel Vadot 108aa1a8ff2SEmmanuel Vadot display-controller@5e01000 { 109aa1a8ff2SEmmanuel Vadot compatible = "qcom,sm6125-dpu"; 110aa1a8ff2SEmmanuel Vadot reg = <0x05e01000 0x83208>, 111aa1a8ff2SEmmanuel Vadot <0x05eb0000 0x2008>; 112aa1a8ff2SEmmanuel Vadot reg-names = "mdp", "vbif"; 113aa1a8ff2SEmmanuel Vadot 114aa1a8ff2SEmmanuel Vadot interrupt-parent = <&mdss>; 115aa1a8ff2SEmmanuel Vadot interrupts = <0>; 116aa1a8ff2SEmmanuel Vadot 117aa1a8ff2SEmmanuel Vadot clocks = <&gcc GCC_DISP_HF_AXI_CLK>, 118aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 119aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_ROT_CLK>, 120aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, 121aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_CLK>, 122aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_VSYNC_CLK>, 123aa1a8ff2SEmmanuel Vadot <&gcc GCC_DISP_THROTTLE_CORE_CLK>; 124aa1a8ff2SEmmanuel Vadot clock-names = "bus", 125aa1a8ff2SEmmanuel Vadot "iface", 126aa1a8ff2SEmmanuel Vadot "rot", 127aa1a8ff2SEmmanuel Vadot "lut", 128aa1a8ff2SEmmanuel Vadot "core", 129aa1a8ff2SEmmanuel Vadot "vsync", 130aa1a8ff2SEmmanuel Vadot "throttle"; 131aa1a8ff2SEmmanuel Vadot assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 132aa1a8ff2SEmmanuel Vadot assigned-clock-rates = <19200000>; 133aa1a8ff2SEmmanuel Vadot 134aa1a8ff2SEmmanuel Vadot operating-points-v2 = <&mdp_opp_table>; 135aa1a8ff2SEmmanuel Vadot power-domains = <&rpmpd SM6125_VDDCX>; 136aa1a8ff2SEmmanuel Vadot 137aa1a8ff2SEmmanuel Vadot ports { 138aa1a8ff2SEmmanuel Vadot #address-cells = <1>; 139aa1a8ff2SEmmanuel Vadot #size-cells = <0>; 140aa1a8ff2SEmmanuel Vadot 141aa1a8ff2SEmmanuel Vadot port@0 { 142aa1a8ff2SEmmanuel Vadot reg = <0>; 143aa1a8ff2SEmmanuel Vadot dpu_intf1_out: endpoint { 144aa1a8ff2SEmmanuel Vadot remote-endpoint = <&mdss_dsi0_in>; 145aa1a8ff2SEmmanuel Vadot }; 146aa1a8ff2SEmmanuel Vadot }; 147aa1a8ff2SEmmanuel Vadot }; 148aa1a8ff2SEmmanuel Vadot }; 149aa1a8ff2SEmmanuel Vadot 150aa1a8ff2SEmmanuel Vadot dsi@5e94000 { 151aa1a8ff2SEmmanuel Vadot compatible = "qcom,sm6125-dsi-ctrl", "qcom,mdss-dsi-ctrl"; 152aa1a8ff2SEmmanuel Vadot reg = <0x05e94000 0x400>; 153aa1a8ff2SEmmanuel Vadot reg-names = "dsi_ctrl"; 154aa1a8ff2SEmmanuel Vadot 155aa1a8ff2SEmmanuel Vadot interrupt-parent = <&mdss>; 156aa1a8ff2SEmmanuel Vadot interrupts = <4>; 157aa1a8ff2SEmmanuel Vadot 158aa1a8ff2SEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 159aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 160aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 161aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_ESC0_CLK>, 162aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 163aa1a8ff2SEmmanuel Vadot <&gcc GCC_DISP_HF_AXI_CLK>; 164aa1a8ff2SEmmanuel Vadot clock-names = "byte", 165aa1a8ff2SEmmanuel Vadot "byte_intf", 166aa1a8ff2SEmmanuel Vadot "pixel", 167aa1a8ff2SEmmanuel Vadot "core", 168aa1a8ff2SEmmanuel Vadot "iface", 169aa1a8ff2SEmmanuel Vadot "bus"; 170aa1a8ff2SEmmanuel Vadot assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, 171aa1a8ff2SEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; 172aa1a8ff2SEmmanuel Vadot assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; 173aa1a8ff2SEmmanuel Vadot 174aa1a8ff2SEmmanuel Vadot operating-points-v2 = <&dsi_opp_table>; 175aa1a8ff2SEmmanuel Vadot power-domains = <&rpmpd SM6125_VDDCX>; 176aa1a8ff2SEmmanuel Vadot 177aa1a8ff2SEmmanuel Vadot phys = <&mdss_dsi0_phy>; 178aa1a8ff2SEmmanuel Vadot phy-names = "dsi"; 179aa1a8ff2SEmmanuel Vadot 180aa1a8ff2SEmmanuel Vadot #address-cells = <1>; 181aa1a8ff2SEmmanuel Vadot #size-cells = <0>; 182aa1a8ff2SEmmanuel Vadot 183aa1a8ff2SEmmanuel Vadot ports { 184aa1a8ff2SEmmanuel Vadot #address-cells = <1>; 185aa1a8ff2SEmmanuel Vadot #size-cells = <0>; 186aa1a8ff2SEmmanuel Vadot 187aa1a8ff2SEmmanuel Vadot port@0 { 188aa1a8ff2SEmmanuel Vadot reg = <0>; 189aa1a8ff2SEmmanuel Vadot mdss_dsi0_in: endpoint { 190aa1a8ff2SEmmanuel Vadot remote-endpoint = <&dpu_intf1_out>; 191aa1a8ff2SEmmanuel Vadot }; 192aa1a8ff2SEmmanuel Vadot }; 193aa1a8ff2SEmmanuel Vadot 194aa1a8ff2SEmmanuel Vadot port@1 { 195aa1a8ff2SEmmanuel Vadot reg = <1>; 196aa1a8ff2SEmmanuel Vadot mdss_dsi0_out: endpoint { 197aa1a8ff2SEmmanuel Vadot }; 198aa1a8ff2SEmmanuel Vadot }; 199aa1a8ff2SEmmanuel Vadot }; 200aa1a8ff2SEmmanuel Vadot }; 201aa1a8ff2SEmmanuel Vadot 202aa1a8ff2SEmmanuel Vadot phy@5e94400 { 203aa1a8ff2SEmmanuel Vadot compatible = "qcom,sm6125-dsi-phy-14nm"; 204aa1a8ff2SEmmanuel Vadot reg = <0x05e94400 0x100>, 205aa1a8ff2SEmmanuel Vadot <0x05e94500 0x300>, 206aa1a8ff2SEmmanuel Vadot <0x05e94800 0x188>; 207aa1a8ff2SEmmanuel Vadot reg-names = "dsi_phy", 208aa1a8ff2SEmmanuel Vadot "dsi_phy_lane", 209aa1a8ff2SEmmanuel Vadot "dsi_pll"; 210aa1a8ff2SEmmanuel Vadot 211aa1a8ff2SEmmanuel Vadot #clock-cells = <1>; 212aa1a8ff2SEmmanuel Vadot #phy-cells = <0>; 213aa1a8ff2SEmmanuel Vadot 214aa1a8ff2SEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 215aa1a8ff2SEmmanuel Vadot <&rpmcc RPM_SMD_XO_CLK_SRC>; 216aa1a8ff2SEmmanuel Vadot clock-names = "iface", 217aa1a8ff2SEmmanuel Vadot "ref"; 218aa1a8ff2SEmmanuel Vadot 219aa1a8ff2SEmmanuel Vadot required-opps = <&rpmpd_opp_nom>; 220aa1a8ff2SEmmanuel Vadot power-domains = <&rpmpd SM6125_VDDMX>; 221aa1a8ff2SEmmanuel Vadot }; 222aa1a8ff2SEmmanuel Vadot }; 223aa1a8ff2SEmmanuel Vadot... 224