1aa1a8ff2SEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2cb7aa33aSEmmanuel Vadot%YAML 1.2 3cb7aa33aSEmmanuel Vadot--- 4cb7aa33aSEmmanuel Vadot$id: http://devicetree.org/schemas/display/msm/qcom,sm8450-mdss.yaml# 5cb7aa33aSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6cb7aa33aSEmmanuel Vadot 7cb7aa33aSEmmanuel Vadottitle: Qualcomm SM8450 Display MDSS 8cb7aa33aSEmmanuel Vadot 9cb7aa33aSEmmanuel Vadotmaintainers: 10cb7aa33aSEmmanuel Vadot - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 11cb7aa33aSEmmanuel Vadot 12cb7aa33aSEmmanuel Vadotdescription: 13cb7aa33aSEmmanuel Vadot SM8450 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like 14cb7aa33aSEmmanuel Vadot DPU display controller, DSI and DP interfaces etc. 15cb7aa33aSEmmanuel Vadot 16cb7aa33aSEmmanuel Vadot$ref: /schemas/display/msm/mdss-common.yaml# 17cb7aa33aSEmmanuel Vadot 18cb7aa33aSEmmanuel Vadotproperties: 19cb7aa33aSEmmanuel Vadot compatible: 20cb7aa33aSEmmanuel Vadot const: qcom,sm8450-mdss 21cb7aa33aSEmmanuel Vadot 22cb7aa33aSEmmanuel Vadot clocks: 23cb7aa33aSEmmanuel Vadot items: 24cb7aa33aSEmmanuel Vadot - description: Display AHB 25cb7aa33aSEmmanuel Vadot - description: Display hf AXI 26cb7aa33aSEmmanuel Vadot - description: Display sf AXI 27cb7aa33aSEmmanuel Vadot - description: Display core 28cb7aa33aSEmmanuel Vadot 29cb7aa33aSEmmanuel Vadot iommus: 30cb7aa33aSEmmanuel Vadot maxItems: 1 31cb7aa33aSEmmanuel Vadot 32cb7aa33aSEmmanuel Vadot interconnects: 33*8d13bc63SEmmanuel Vadot maxItems: 3 34cb7aa33aSEmmanuel Vadot 35cb7aa33aSEmmanuel Vadot interconnect-names: 36*8d13bc63SEmmanuel Vadot maxItems: 3 37cb7aa33aSEmmanuel Vadot 38cb7aa33aSEmmanuel VadotpatternProperties: 39cb7aa33aSEmmanuel Vadot "^display-controller@[0-9a-f]+$": 40cb7aa33aSEmmanuel Vadot type: object 4184943d6fSEmmanuel Vadot additionalProperties: true 4284943d6fSEmmanuel Vadot 43cb7aa33aSEmmanuel Vadot properties: 44cb7aa33aSEmmanuel Vadot compatible: 45cb7aa33aSEmmanuel Vadot const: qcom,sm8450-dpu 46cb7aa33aSEmmanuel Vadot 47aa1a8ff2SEmmanuel Vadot "^displayport-controller@[0-9a-f]+$": 48aa1a8ff2SEmmanuel Vadot type: object 4984943d6fSEmmanuel Vadot additionalProperties: true 5084943d6fSEmmanuel Vadot 51aa1a8ff2SEmmanuel Vadot properties: 52aa1a8ff2SEmmanuel Vadot compatible: 53aa1a8ff2SEmmanuel Vadot items: 54aa1a8ff2SEmmanuel Vadot - const: qcom,sm8450-dp 55aa1a8ff2SEmmanuel Vadot - const: qcom,sm8350-dp 56aa1a8ff2SEmmanuel Vadot 57cb7aa33aSEmmanuel Vadot "^dsi@[0-9a-f]+$": 58cb7aa33aSEmmanuel Vadot type: object 5984943d6fSEmmanuel Vadot additionalProperties: true 6084943d6fSEmmanuel Vadot 61cb7aa33aSEmmanuel Vadot properties: 62cb7aa33aSEmmanuel Vadot compatible: 63cb7aa33aSEmmanuel Vadot items: 64cb7aa33aSEmmanuel Vadot - const: qcom,sm8450-dsi-ctrl 65cb7aa33aSEmmanuel Vadot - const: qcom,mdss-dsi-ctrl 66cb7aa33aSEmmanuel Vadot 67cb7aa33aSEmmanuel Vadot "^phy@[0-9a-f]+$": 68cb7aa33aSEmmanuel Vadot type: object 6984943d6fSEmmanuel Vadot additionalProperties: true 7084943d6fSEmmanuel Vadot 71cb7aa33aSEmmanuel Vadot properties: 72cb7aa33aSEmmanuel Vadot compatible: 73fac71e4eSEmmanuel Vadot const: qcom,sm8450-dsi-phy-5nm 74cb7aa33aSEmmanuel Vadot 75cb7aa33aSEmmanuel Vadotrequired: 76cb7aa33aSEmmanuel Vadot - compatible 77cb7aa33aSEmmanuel Vadot 78cb7aa33aSEmmanuel VadotunevaluatedProperties: false 79cb7aa33aSEmmanuel Vadot 80cb7aa33aSEmmanuel Vadotexamples: 81cb7aa33aSEmmanuel Vadot - | 82cb7aa33aSEmmanuel Vadot #include <dt-bindings/clock/qcom,sm8450-dispcc.h> 83cb7aa33aSEmmanuel Vadot #include <dt-bindings/clock/qcom,gcc-sm8450.h> 84cb7aa33aSEmmanuel Vadot #include <dt-bindings/clock/qcom,rpmh.h> 85cb7aa33aSEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 86cb7aa33aSEmmanuel Vadot #include <dt-bindings/interconnect/qcom,sm8450.h> 87aa1a8ff2SEmmanuel Vadot #include <dt-bindings/power/qcom,rpmhpd.h> 88cb7aa33aSEmmanuel Vadot 89cb7aa33aSEmmanuel Vadot display-subsystem@ae00000 { 90cb7aa33aSEmmanuel Vadot compatible = "qcom,sm8450-mdss"; 91cb7aa33aSEmmanuel Vadot reg = <0x0ae00000 0x1000>; 92cb7aa33aSEmmanuel Vadot reg-names = "mdss"; 93cb7aa33aSEmmanuel Vadot 94*8d13bc63SEmmanuel Vadot interconnects = <&mmss_noc MASTER_MDP_DISP &mc_virt SLAVE_EBI1_DISP>, 95*8d13bc63SEmmanuel Vadot <&mmss_noc MASTER_MDP_DISP &mc_virt SLAVE_EBI1_DISP>, 96*8d13bc63SEmmanuel Vadot <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>; 97*8d13bc63SEmmanuel Vadot interconnect-names = "mdp0-mem", 98*8d13bc63SEmmanuel Vadot "mdp1-mem", 99*8d13bc63SEmmanuel Vadot "cpu-cfg"; 100cb7aa33aSEmmanuel Vadot 101cb7aa33aSEmmanuel Vadot resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; 102cb7aa33aSEmmanuel Vadot 103cb7aa33aSEmmanuel Vadot power-domains = <&dispcc MDSS_GDSC>; 104cb7aa33aSEmmanuel Vadot 105cb7aa33aSEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 106cb7aa33aSEmmanuel Vadot <&gcc GCC_DISP_HF_AXI_CLK>, 107cb7aa33aSEmmanuel Vadot <&gcc GCC_DISP_SF_AXI_CLK>, 108cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_CLK>; 109cb7aa33aSEmmanuel Vadot clock-names = "iface", "bus", "nrt_bus", "core"; 110cb7aa33aSEmmanuel Vadot 111cb7aa33aSEmmanuel Vadot interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 112cb7aa33aSEmmanuel Vadot interrupt-controller; 113cb7aa33aSEmmanuel Vadot #interrupt-cells = <1>; 114cb7aa33aSEmmanuel Vadot 115cb7aa33aSEmmanuel Vadot iommus = <&apps_smmu 0x2800 0x402>; 116cb7aa33aSEmmanuel Vadot 117cb7aa33aSEmmanuel Vadot #address-cells = <1>; 118cb7aa33aSEmmanuel Vadot #size-cells = <1>; 119cb7aa33aSEmmanuel Vadot ranges; 120cb7aa33aSEmmanuel Vadot 121cb7aa33aSEmmanuel Vadot display-controller@ae01000 { 122cb7aa33aSEmmanuel Vadot compatible = "qcom,sm8450-dpu"; 123cb7aa33aSEmmanuel Vadot reg = <0x0ae01000 0x8f000>, 124cb7aa33aSEmmanuel Vadot <0x0aeb0000 0x2008>; 125cb7aa33aSEmmanuel Vadot reg-names = "mdp", "vbif"; 126cb7aa33aSEmmanuel Vadot 127cb7aa33aSEmmanuel Vadot clocks = <&gcc GCC_DISP_HF_AXI_CLK>, 128cb7aa33aSEmmanuel Vadot <&gcc GCC_DISP_SF_AXI_CLK>, 129cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 130cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, 131cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_MDP_CLK>, 132cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 133cb7aa33aSEmmanuel Vadot clock-names = "bus", 134cb7aa33aSEmmanuel Vadot "nrt_bus", 135cb7aa33aSEmmanuel Vadot "iface", 136cb7aa33aSEmmanuel Vadot "lut", 137cb7aa33aSEmmanuel Vadot "core", 138cb7aa33aSEmmanuel Vadot "vsync"; 139cb7aa33aSEmmanuel Vadot 140cb7aa33aSEmmanuel Vadot assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 141cb7aa33aSEmmanuel Vadot assigned-clock-rates = <19200000>; 142cb7aa33aSEmmanuel Vadot 143cb7aa33aSEmmanuel Vadot operating-points-v2 = <&mdp_opp_table>; 144aa1a8ff2SEmmanuel Vadot power-domains = <&rpmhpd RPMHPD_MMCX>; 145cb7aa33aSEmmanuel Vadot 146cb7aa33aSEmmanuel Vadot interrupt-parent = <&mdss>; 147cb7aa33aSEmmanuel Vadot interrupts = <0>; 148cb7aa33aSEmmanuel Vadot 149cb7aa33aSEmmanuel Vadot ports { 150cb7aa33aSEmmanuel Vadot #address-cells = <1>; 151cb7aa33aSEmmanuel Vadot #size-cells = <0>; 152cb7aa33aSEmmanuel Vadot 153cb7aa33aSEmmanuel Vadot port@0 { 154cb7aa33aSEmmanuel Vadot reg = <0>; 155cb7aa33aSEmmanuel Vadot dpu_intf1_out: endpoint { 156cb7aa33aSEmmanuel Vadot remote-endpoint = <&dsi0_in>; 157cb7aa33aSEmmanuel Vadot }; 158cb7aa33aSEmmanuel Vadot }; 159cb7aa33aSEmmanuel Vadot 160cb7aa33aSEmmanuel Vadot port@1 { 161cb7aa33aSEmmanuel Vadot reg = <1>; 162cb7aa33aSEmmanuel Vadot dpu_intf2_out: endpoint { 163cb7aa33aSEmmanuel Vadot remote-endpoint = <&dsi1_in>; 164cb7aa33aSEmmanuel Vadot }; 165cb7aa33aSEmmanuel Vadot }; 166cb7aa33aSEmmanuel Vadot }; 167cb7aa33aSEmmanuel Vadot 168cb7aa33aSEmmanuel Vadot mdp_opp_table: opp-table { 169cb7aa33aSEmmanuel Vadot compatible = "operating-points-v2"; 170cb7aa33aSEmmanuel Vadot 171cb7aa33aSEmmanuel Vadot opp-172000000{ 172cb7aa33aSEmmanuel Vadot opp-hz = /bits/ 64 <172000000>; 173cb7aa33aSEmmanuel Vadot required-opps = <&rpmhpd_opp_low_svs_d1>; 174cb7aa33aSEmmanuel Vadot }; 175cb7aa33aSEmmanuel Vadot 176cb7aa33aSEmmanuel Vadot opp-200000000 { 177cb7aa33aSEmmanuel Vadot opp-hz = /bits/ 64 <200000000>; 178cb7aa33aSEmmanuel Vadot required-opps = <&rpmhpd_opp_low_svs>; 179cb7aa33aSEmmanuel Vadot }; 180cb7aa33aSEmmanuel Vadot 181cb7aa33aSEmmanuel Vadot opp-325000000 { 182cb7aa33aSEmmanuel Vadot opp-hz = /bits/ 64 <325000000>; 183cb7aa33aSEmmanuel Vadot required-opps = <&rpmhpd_opp_svs>; 184cb7aa33aSEmmanuel Vadot }; 185cb7aa33aSEmmanuel Vadot 186cb7aa33aSEmmanuel Vadot opp-375000000 { 187cb7aa33aSEmmanuel Vadot opp-hz = /bits/ 64 <375000000>; 188cb7aa33aSEmmanuel Vadot required-opps = <&rpmhpd_opp_svs_l1>; 189cb7aa33aSEmmanuel Vadot }; 190cb7aa33aSEmmanuel Vadot 191cb7aa33aSEmmanuel Vadot opp-500000000 { 192cb7aa33aSEmmanuel Vadot opp-hz = /bits/ 64 <500000000>; 193cb7aa33aSEmmanuel Vadot required-opps = <&rpmhpd_opp_nom>; 194cb7aa33aSEmmanuel Vadot }; 195cb7aa33aSEmmanuel Vadot }; 196cb7aa33aSEmmanuel Vadot }; 197cb7aa33aSEmmanuel Vadot 198cb7aa33aSEmmanuel Vadot dsi@ae94000 { 199cb7aa33aSEmmanuel Vadot compatible = "qcom,sm8450-dsi-ctrl", "qcom,mdss-dsi-ctrl"; 200cb7aa33aSEmmanuel Vadot reg = <0x0ae94000 0x400>; 201cb7aa33aSEmmanuel Vadot reg-names = "dsi_ctrl"; 202cb7aa33aSEmmanuel Vadot 203cb7aa33aSEmmanuel Vadot interrupt-parent = <&mdss>; 204cb7aa33aSEmmanuel Vadot interrupts = <4>; 205cb7aa33aSEmmanuel Vadot 206cb7aa33aSEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 207cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 208cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 209cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_ESC0_CLK>, 210cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 211cb7aa33aSEmmanuel Vadot <&gcc GCC_DISP_HF_AXI_CLK>; 212cb7aa33aSEmmanuel Vadot clock-names = "byte", 213cb7aa33aSEmmanuel Vadot "byte_intf", 214cb7aa33aSEmmanuel Vadot "pixel", 215cb7aa33aSEmmanuel Vadot "core", 216cb7aa33aSEmmanuel Vadot "iface", 217cb7aa33aSEmmanuel Vadot "bus"; 218cb7aa33aSEmmanuel Vadot 219cb7aa33aSEmmanuel Vadot assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, 220cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; 221cb7aa33aSEmmanuel Vadot assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; 222cb7aa33aSEmmanuel Vadot 223cb7aa33aSEmmanuel Vadot operating-points-v2 = <&dsi_opp_table>; 224aa1a8ff2SEmmanuel Vadot power-domains = <&rpmhpd RPMHPD_MMCX>; 225cb7aa33aSEmmanuel Vadot 226cb7aa33aSEmmanuel Vadot phys = <&dsi0_phy>; 227cb7aa33aSEmmanuel Vadot phy-names = "dsi"; 228cb7aa33aSEmmanuel Vadot 229cb7aa33aSEmmanuel Vadot #address-cells = <1>; 230cb7aa33aSEmmanuel Vadot #size-cells = <0>; 231cb7aa33aSEmmanuel Vadot 232cb7aa33aSEmmanuel Vadot ports { 233cb7aa33aSEmmanuel Vadot #address-cells = <1>; 234cb7aa33aSEmmanuel Vadot #size-cells = <0>; 235cb7aa33aSEmmanuel Vadot 236cb7aa33aSEmmanuel Vadot port@0 { 237cb7aa33aSEmmanuel Vadot reg = <0>; 238cb7aa33aSEmmanuel Vadot dsi0_in: endpoint { 239cb7aa33aSEmmanuel Vadot remote-endpoint = <&dpu_intf1_out>; 240cb7aa33aSEmmanuel Vadot }; 241cb7aa33aSEmmanuel Vadot }; 242cb7aa33aSEmmanuel Vadot 243cb7aa33aSEmmanuel Vadot port@1 { 244cb7aa33aSEmmanuel Vadot reg = <1>; 245cb7aa33aSEmmanuel Vadot dsi0_out: endpoint { 246cb7aa33aSEmmanuel Vadot }; 247cb7aa33aSEmmanuel Vadot }; 248cb7aa33aSEmmanuel Vadot }; 249cb7aa33aSEmmanuel Vadot 250cb7aa33aSEmmanuel Vadot dsi_opp_table: opp-table { 251cb7aa33aSEmmanuel Vadot compatible = "operating-points-v2"; 252cb7aa33aSEmmanuel Vadot 253cb7aa33aSEmmanuel Vadot opp-160310000{ 254cb7aa33aSEmmanuel Vadot opp-hz = /bits/ 64 <160310000>; 255cb7aa33aSEmmanuel Vadot required-opps = <&rpmhpd_opp_low_svs_d1>; 256cb7aa33aSEmmanuel Vadot }; 257cb7aa33aSEmmanuel Vadot 258cb7aa33aSEmmanuel Vadot opp-187500000 { 259cb7aa33aSEmmanuel Vadot opp-hz = /bits/ 64 <187500000>; 260cb7aa33aSEmmanuel Vadot required-opps = <&rpmhpd_opp_low_svs>; 261cb7aa33aSEmmanuel Vadot }; 262cb7aa33aSEmmanuel Vadot 263cb7aa33aSEmmanuel Vadot opp-300000000 { 264cb7aa33aSEmmanuel Vadot opp-hz = /bits/ 64 <300000000>; 265cb7aa33aSEmmanuel Vadot required-opps = <&rpmhpd_opp_svs>; 266cb7aa33aSEmmanuel Vadot }; 267cb7aa33aSEmmanuel Vadot 268cb7aa33aSEmmanuel Vadot opp-358000000 { 269cb7aa33aSEmmanuel Vadot opp-hz = /bits/ 64 <358000000>; 270cb7aa33aSEmmanuel Vadot required-opps = <&rpmhpd_opp_svs_l1>; 271cb7aa33aSEmmanuel Vadot }; 272cb7aa33aSEmmanuel Vadot }; 273cb7aa33aSEmmanuel Vadot }; 274cb7aa33aSEmmanuel Vadot 275cb7aa33aSEmmanuel Vadot dsi0_phy: phy@ae94400 { 276fac71e4eSEmmanuel Vadot compatible = "qcom,sm8450-dsi-phy-5nm"; 277cb7aa33aSEmmanuel Vadot reg = <0x0ae94400 0x200>, 278cb7aa33aSEmmanuel Vadot <0x0ae94600 0x280>, 279cb7aa33aSEmmanuel Vadot <0x0ae94900 0x260>; 280cb7aa33aSEmmanuel Vadot reg-names = "dsi_phy", 281cb7aa33aSEmmanuel Vadot "dsi_phy_lane", 282cb7aa33aSEmmanuel Vadot "dsi_pll"; 283cb7aa33aSEmmanuel Vadot 284cb7aa33aSEmmanuel Vadot #clock-cells = <1>; 285cb7aa33aSEmmanuel Vadot #phy-cells = <0>; 286cb7aa33aSEmmanuel Vadot 287cb7aa33aSEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 288cb7aa33aSEmmanuel Vadot <&rpmhcc RPMH_CXO_CLK>; 289cb7aa33aSEmmanuel Vadot clock-names = "iface", "ref"; 290cb7aa33aSEmmanuel Vadot vdds-supply = <&vreg_dsi_phy>; 291cb7aa33aSEmmanuel Vadot }; 292cb7aa33aSEmmanuel Vadot 293cb7aa33aSEmmanuel Vadot dsi@ae96000 { 294cb7aa33aSEmmanuel Vadot compatible = "qcom,sm8450-dsi-ctrl", "qcom,mdss-dsi-ctrl"; 295cb7aa33aSEmmanuel Vadot reg = <0x0ae96000 0x400>; 296cb7aa33aSEmmanuel Vadot reg-names = "dsi_ctrl"; 297cb7aa33aSEmmanuel Vadot 298cb7aa33aSEmmanuel Vadot interrupt-parent = <&mdss>; 299cb7aa33aSEmmanuel Vadot interrupts = <5>; 300cb7aa33aSEmmanuel Vadot 301cb7aa33aSEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, 302cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, 303cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK1_CLK>, 304cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_ESC1_CLK>, 305cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_AHB_CLK>, 306cb7aa33aSEmmanuel Vadot <&gcc GCC_DISP_HF_AXI_CLK>; 307cb7aa33aSEmmanuel Vadot clock-names = "byte", 308cb7aa33aSEmmanuel Vadot "byte_intf", 309cb7aa33aSEmmanuel Vadot "pixel", 310cb7aa33aSEmmanuel Vadot "core", 311cb7aa33aSEmmanuel Vadot "iface", 312cb7aa33aSEmmanuel Vadot "bus"; 313cb7aa33aSEmmanuel Vadot 314cb7aa33aSEmmanuel Vadot assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, 315cb7aa33aSEmmanuel Vadot <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; 316cb7aa33aSEmmanuel Vadot assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>; 317cb7aa33aSEmmanuel Vadot 318cb7aa33aSEmmanuel Vadot operating-points-v2 = <&dsi_opp_table>; 319aa1a8ff2SEmmanuel Vadot power-domains = <&rpmhpd RPMHPD_MMCX>; 320cb7aa33aSEmmanuel Vadot 321cb7aa33aSEmmanuel Vadot phys = <&dsi1_phy>; 322cb7aa33aSEmmanuel Vadot phy-names = "dsi"; 323cb7aa33aSEmmanuel Vadot 324cb7aa33aSEmmanuel Vadot #address-cells = <1>; 325cb7aa33aSEmmanuel Vadot #size-cells = <0>; 326cb7aa33aSEmmanuel Vadot 327cb7aa33aSEmmanuel Vadot ports { 328cb7aa33aSEmmanuel Vadot #address-cells = <1>; 329cb7aa33aSEmmanuel Vadot #size-cells = <0>; 330cb7aa33aSEmmanuel Vadot 331cb7aa33aSEmmanuel Vadot port@0 { 332cb7aa33aSEmmanuel Vadot reg = <0>; 333cb7aa33aSEmmanuel Vadot dsi1_in: endpoint { 334cb7aa33aSEmmanuel Vadot remote-endpoint = <&dpu_intf2_out>; 335cb7aa33aSEmmanuel Vadot }; 336cb7aa33aSEmmanuel Vadot }; 337cb7aa33aSEmmanuel Vadot 338cb7aa33aSEmmanuel Vadot port@1 { 339cb7aa33aSEmmanuel Vadot reg = <1>; 340cb7aa33aSEmmanuel Vadot dsi1_out: endpoint { 341cb7aa33aSEmmanuel Vadot }; 342cb7aa33aSEmmanuel Vadot }; 343cb7aa33aSEmmanuel Vadot }; 344cb7aa33aSEmmanuel Vadot }; 345cb7aa33aSEmmanuel Vadot 346cb7aa33aSEmmanuel Vadot dsi1_phy: phy@ae96400 { 347fac71e4eSEmmanuel Vadot compatible = "qcom,sm8450-dsi-phy-5nm"; 348cb7aa33aSEmmanuel Vadot reg = <0x0ae96400 0x200>, 349cb7aa33aSEmmanuel Vadot <0x0ae96600 0x280>, 350cb7aa33aSEmmanuel Vadot <0x0ae96900 0x260>; 351cb7aa33aSEmmanuel Vadot reg-names = "dsi_phy", 352cb7aa33aSEmmanuel Vadot "dsi_phy_lane", 353cb7aa33aSEmmanuel Vadot "dsi_pll"; 354cb7aa33aSEmmanuel Vadot 355cb7aa33aSEmmanuel Vadot #clock-cells = <1>; 356cb7aa33aSEmmanuel Vadot #phy-cells = <0>; 357cb7aa33aSEmmanuel Vadot 358cb7aa33aSEmmanuel Vadot clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 359cb7aa33aSEmmanuel Vadot <&rpmhcc RPMH_CXO_CLK>; 360cb7aa33aSEmmanuel Vadot clock-names = "iface", "ref"; 361cb7aa33aSEmmanuel Vadot vdds-supply = <&vreg_dsi_phy>; 362cb7aa33aSEmmanuel Vadot }; 363cb7aa33aSEmmanuel Vadot }; 364cb7aa33aSEmmanuel Vadot... 365