1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/apple,admac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Apple Audio DMA Controller (ADMAC)
8
9description: |
10  Apple's Audio DMA Controller (ADMAC) is used to fetch and store audio samples
11  on SoCs from the "Apple Silicon" family.
12
13  The controller has been seen with up to 24 channels. Even-numbered channels
14  are TX-only, odd-numbered are RX-only. Individual channels are coupled to
15  fixed device endpoints.
16
17maintainers:
18  - Martin Povišer <povik+lin@cutebit.org>
19
20allOf:
21  - $ref: "dma-controller.yaml#"
22
23properties:
24  compatible:
25    items:
26      - enum:
27          - apple,t6000-admac
28          - apple,t8103-admac
29      - const: apple,admac
30
31  reg:
32    maxItems: 1
33
34  '#dma-cells':
35    const: 1
36    description:
37      Clients specify a single cell with channel number.
38
39  dma-channels:
40    maximum: 24
41
42  interrupts:
43    minItems: 4
44    maxItems: 4
45    description:
46      Interrupts that correspond to the 4 IRQ outputs of the controller. Usually
47      only one of the controller outputs will be connected as an usable interrupt
48      source. The remaining interrupts will be left without a valid value, e.g.
49      in an interrupts-extended list the disconnected positions will contain
50      an empty phandle reference <0>.
51
52required:
53  - compatible
54  - reg
55  - '#dma-cells'
56  - dma-channels
57  - interrupts
58
59additionalProperties: false
60
61examples:
62  - |
63    #include <dt-bindings/interrupt-controller/apple-aic.h>
64    #include <dt-bindings/interrupt-controller/irq.h>
65
66    aic: interrupt-controller {
67      interrupt-controller;
68      #interrupt-cells = <3>;
69    };
70
71    admac: dma-controller@238200000 {
72      compatible = "apple,t8103-admac", "apple,admac";
73      reg = <0x38200000 0x34000>;
74      dma-channels = <24>;
75      interrupts-extended = <0>,
76                            <&aic AIC_IRQ 626 IRQ_TYPE_LEVEL_HIGH>,
77                            <0>,
78                            <0>;
79      #dma-cells = <1>;
80    };
81