1* ARM PrimeCells PL080 and PL081 and derivatives DMA controller
2
3Required properties:
4- compatible: "arm,pl080", "arm,primecell";
5	      "arm,pl081", "arm,primecell";
6	      "faraday,ftdmac020", "arm,primecell"
7- arm,primecell-periphid: on the FTDMAC020 the primecell ID is not hard-coded
8  in the hardware and must be specified here as <0x0003b080>. This number
9  follows the PrimeCell standard numbering using the JEP106 vendor code 0x38
10  for Faraday Technology.
11- reg: Address range of the PL08x registers
12- interrupt: The PL08x interrupt number
13- clocks: The clock running the IP core clock
14- clock-names: Must contain "apb_pclk"
15- lli-bus-interface-ahb1: if AHB master 1 is eligible for fetching LLIs
16- lli-bus-interface-ahb2: if AHB master 2 is eligible for fetching LLIs
17- mem-bus-interface-ahb1: if AHB master 1 is eligible for fetching memory contents
18- mem-bus-interface-ahb2: if AHB master 2 is eligible for fetching memory contents
19- #dma-cells: must be <2>. First cell should contain the DMA request,
20              second cell should contain either 1 or 2 depending on
21              which AHB master that is used.
22
23Optional properties:
24- dma-channels: contains the total number of DMA channels supported by the DMAC
25- dma-requests: contains the total number of DMA requests supported by the DMAC
26- memcpy-burst-size: the size of the bursts for memcpy: 1, 4, 8, 16, 32
27  64, 128 or 256 bytes are legal values
28- memcpy-bus-width: the bus width used for memcpy in bits: 8, 16 or 32 are legal
29  values, the Faraday FTDMAC020 can also accept 64 bits
30
31Clients
32Required properties:
33- dmas: List of DMA controller phandle, request channel and AHB master id
34- dma-names: Names of the aforementioned requested channels
35
36Example:
37
38dmac0: dma-controller@10130000 {
39	compatible = "arm,pl080", "arm,primecell";
40	reg = <0x10130000 0x1000>;
41	interrupt-parent = <&vica>;
42	interrupts = <15>;
43	clocks = <&hclkdma0>;
44	clock-names = "apb_pclk";
45	lli-bus-interface-ahb1;
46	lli-bus-interface-ahb2;
47	mem-bus-interface-ahb2;
48	memcpy-burst-size = <256>;
49	memcpy-bus-width = <32>;
50	#dma-cells = <2>;
51};
52
53device@40008000 {
54	...
55	dmas = <&dmac0 0 2
56		&dmac0 1 2>;
57	dma-names = "tx", "rx";
58	...
59};
60