1*c66ec88fSEmmanuel Vadot* STMicroelectronics Flexible Direct Memory Access Device Tree bindings
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotThe FDMA is a general-purpose direct memory access controller capable of
4*c66ec88fSEmmanuel Vadotsupporting 16 independent DMA channels. It accepts up to 32 DMA requests.
5*c66ec88fSEmmanuel VadotThe FDMA is based on a Slim processor which requires a firmware.
6*c66ec88fSEmmanuel Vadot
7*c66ec88fSEmmanuel Vadot* FDMA Controller
8*c66ec88fSEmmanuel Vadot
9*c66ec88fSEmmanuel VadotRequired properties:
10*c66ec88fSEmmanuel Vadot- compatible	: Should be one of
11*c66ec88fSEmmanuel Vadot		 - st,stih407-fdma-mpe31-11, "st,slim-rproc";
12*c66ec88fSEmmanuel Vadot		 - st,stih407-fdma-mpe31-12, "st,slim-rproc";
13*c66ec88fSEmmanuel Vadot		 - st,stih407-fdma-mpe31-13, "st,slim-rproc";
14*c66ec88fSEmmanuel Vadot- reg		: Should contain an entry for each name in reg-names
15*c66ec88fSEmmanuel Vadot- reg-names	: Must contain "slimcore", "dmem", "peripherals", "imem" entries
16*c66ec88fSEmmanuel Vadot- interrupts	: Should contain one interrupt shared by all channels
17*c66ec88fSEmmanuel Vadot- dma-channels	: Number of channels supported by the controller
18*c66ec88fSEmmanuel Vadot- #dma-cells	: Must be <3>. See DMA client section below
19*c66ec88fSEmmanuel Vadot- clocks	: Must contain an entry for each clock
20*c66ec88fSEmmanuel VadotSee: Documentation/devicetree/bindings/clock/clock-bindings.txt
21*c66ec88fSEmmanuel Vadot
22*c66ec88fSEmmanuel Vadot
23*c66ec88fSEmmanuel VadotExample:
24*c66ec88fSEmmanuel Vadot
25*c66ec88fSEmmanuel Vadot	fdma0: dma-controller@8e20000 {
26*c66ec88fSEmmanuel Vadot		compatible = "st,stih407-fdma-mpe31-11", "st,slim-rproc";
27*c66ec88fSEmmanuel Vadot		reg = <0x8e20000 0x8000>,
28*c66ec88fSEmmanuel Vadot		      <0x8e30000 0x3000>,
29*c66ec88fSEmmanuel Vadot		      <0x8e37000 0x1000>,
30*c66ec88fSEmmanuel Vadot		      <0x8e38000 0x8000>;
31*c66ec88fSEmmanuel Vadot		reg-names = "slimcore", "dmem", "peripherals", "imem";
32*c66ec88fSEmmanuel Vadot		clocks = <&clk_s_c0_flexgen CLK_FDMA>,
33*c66ec88fSEmmanuel Vadot			 <&clk_s_c0_flexgen CLK_EXT2F_A9>,
34*c66ec88fSEmmanuel Vadot			 <&clk_s_c0_flexgen CLK_EXT2F_A9>,
35*c66ec88fSEmmanuel Vadot			 <&clk_s_c0_flexgen CLK_EXT2F_A9>;
36*c66ec88fSEmmanuel Vadot		interrupts = <GIC_SPI 5 IRQ_TYPE_NONE>;
37*c66ec88fSEmmanuel Vadot		dma-channels = <16>;
38*c66ec88fSEmmanuel Vadot		#dma-cells = <3>;
39*c66ec88fSEmmanuel Vadot	};
40*c66ec88fSEmmanuel Vadot
41*c66ec88fSEmmanuel Vadot* DMA client
42*c66ec88fSEmmanuel Vadot
43*c66ec88fSEmmanuel VadotRequired properties:
44*c66ec88fSEmmanuel Vadot- dmas: Comma separated list of dma channel requests
45*c66ec88fSEmmanuel Vadot- dma-names: Names of the aforementioned requested channels
46*c66ec88fSEmmanuel Vadot
47*c66ec88fSEmmanuel VadotEach dmas request consists of 4 cells:
48*c66ec88fSEmmanuel Vadot1. A phandle pointing to the FDMA controller
49*c66ec88fSEmmanuel Vadot2. The request line number
50*c66ec88fSEmmanuel Vadot3. A 32bit mask specifying (see include/linux/platform_data/dma-st-fdma.h)
51*c66ec88fSEmmanuel Vadot -bit 2-0: Holdoff value, dreq will be masked for
52*c66ec88fSEmmanuel Vadot	0x0: 0-0.5us
53*c66ec88fSEmmanuel Vadot	0x1: 0.5-1us
54*c66ec88fSEmmanuel Vadot	0x2: 1-1.5us
55*c66ec88fSEmmanuel Vadot -bit 17: data swap
56*c66ec88fSEmmanuel Vadot	0x0: disabled
57*c66ec88fSEmmanuel Vadot	0x1: enabled
58*c66ec88fSEmmanuel Vadot -bit 21: Increment Address
59*c66ec88fSEmmanuel Vadot	0x0: no address increment between transfers
60*c66ec88fSEmmanuel Vadot	0x1: increment address between transfers
61*c66ec88fSEmmanuel Vadot -bit 22: 2 STBus Initiator Coprocessor interface
62*c66ec88fSEmmanuel Vadot	0x0: high priority port
63*c66ec88fSEmmanuel Vadot	0x1: low priority port
64*c66ec88fSEmmanuel Vadot4. transfers type
65*c66ec88fSEmmanuel Vadot 0 free running
66*c66ec88fSEmmanuel Vadot 1 paced
67*c66ec88fSEmmanuel Vadot
68*c66ec88fSEmmanuel VadotExample:
69*c66ec88fSEmmanuel Vadot
70*c66ec88fSEmmanuel Vadot	sti_uni_player2: sti-uni-player@2 {
71*c66ec88fSEmmanuel Vadot		compatible = "st,sti-uni-player";
72*c66ec88fSEmmanuel Vadot		#sound-dai-cells = <0>;
73*c66ec88fSEmmanuel Vadot		st,syscfg = <&syscfg_core>;
74*c66ec88fSEmmanuel Vadot		clocks = <&clk_s_d0_flexgen CLK_PCM_2>;
75*c66ec88fSEmmanuel Vadot		assigned-clocks = <&clk_s_d0_flexgen CLK_PCM_2>;
76*c66ec88fSEmmanuel Vadot		assigned-clock-parents = <&clk_s_d0_quadfs 2>;
77*c66ec88fSEmmanuel Vadot		assigned-clock-rates = <50000000>;
78*c66ec88fSEmmanuel Vadot		reg = <0x8D82000 0x158>;
79*c66ec88fSEmmanuel Vadot		interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
80*c66ec88fSEmmanuel Vadot		dmas = <&fdma0 4 0 1>;
81*c66ec88fSEmmanuel Vadot		dai-name = "Uni Player #1 (DAC)";
82*c66ec88fSEmmanuel Vadot		dma-names = "tx";
83*c66ec88fSEmmanuel Vadot		st,uniperiph-id = <2>;
84*c66ec88fSEmmanuel Vadot		st,version = <5>;
85*c66ec88fSEmmanuel Vadot		st,mode = "PCM";
86*c66ec88fSEmmanuel Vadot	};
87