1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek mt8186 DSP core
8
9maintainers:
10  - Tinghan Shen <tinghan.shen@mediatek.com>
11
12description: |
13  MediaTek mt8186 SoC contains a DSP core used for
14  advanced pre- and post- audio processing.
15
16properties:
17  compatible:
18    const: mediatek,mt8186-dsp
19
20  reg:
21    items:
22      - description: Address and size of the DSP config registers
23      - description: Address and size of the DSP SRAM
24      - description: Address and size of the DSP secure registers
25      - description: Address and size of the DSP bus registers
26
27  reg-names:
28    items:
29      - const: cfg
30      - const: sram
31      - const: sec
32      - const: bus
33
34  clocks:
35    items:
36      - description: mux for audio dsp clock
37      - description: mux for audio dsp local bus
38
39  clock-names:
40    items:
41      - const: audiodsp
42      - const: adsp_bus
43
44  power-domains:
45    maxItems: 1
46
47  mboxes:
48    items:
49      - description: mailbox for receiving audio DSP requests.
50      - description: mailbox for transmitting requests to audio DSP.
51
52  mbox-names:
53    items:
54      - const: rx
55      - const: tx
56
57  memory-region:
58    items:
59      - description: dma buffer between host and DSP.
60      - description: DSP system memory.
61
62required:
63  - compatible
64  - reg
65  - reg-names
66  - clocks
67  - clock-names
68  - power-domains
69  - mbox-names
70  - mboxes
71
72additionalProperties: false
73
74examples:
75  - |
76    #include <dt-bindings/clock/mt8186-clk.h>
77    dsp@10680000 {
78        compatible = "mediatek,mt8186-dsp";
79        reg = <0x10680000 0x2000>,
80              <0x10800000 0x100000>,
81              <0x1068b000 0x100>,
82              <0x1068f000 0x1000>;
83        reg-names = "cfg", "sram", "sec", "bus";
84        clocks = <&topckgen CLK_TOP_AUDIODSP>,
85                 <&topckgen CLK_TOP_ADSP_BUS>;
86        clock-names = "audiodsp",
87                      "adsp_bus";
88        power-domains = <&spm 6>;
89        mbox-names = "rx", "tx";
90        mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
91    };
92