1Devicetree bindings for Zynq Ultrascale MPSoC FPGA Manager.
2The ZynqMP SoC uses the PCAP (Processor configuration Port) to configure the
3Programmable Logic (PL). The configuration uses  the firmware interface.
4
5Required properties:
6- compatible: should contain "xlnx,zynqmp-pcap-fpga"
7
8Example for full FPGA configuration:
9
10	fpga-region0 {
11		compatible = "fpga-region";
12		fpga-mgr = <&zynqmp_pcap>;
13		#address-cells = <0x1>;
14		#size-cells = <0x1>;
15	};
16
17	firmware {
18		zynqmp_firmware: zynqmp-firmware {
19			compatible = "xlnx,zynqmp-firmware";
20			method = "smc";
21			zynqmp_pcap: pcap {
22				compatible = "xlnx,zynqmp-pcap-fpga";
23			};
24		};
25	};
26