1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpio/mrvl-gpio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Marvell PXA GPIO controller
8
9maintainers:
10  - Linus Walleij <linus.walleij@linaro.org>
11  - Bartosz Golaszewski <bgolaszewski@baylibre.com>
12  - Rob Herring <robh+dt@kernel.org>
13
14allOf:
15  - if:
16      properties:
17        compatible:
18          contains:
19            enum:
20              - intel,pxa25x-gpio
21              - intel,pxa26x-gpio
22              - intel,pxa27x-gpio
23              - intel,pxa3xx-gpio
24    then:
25      properties:
26        interrupts:
27          minItems: 3
28          maxItems: 3
29        interrupt-names:
30          items:
31            - const: gpio0
32            - const: gpio1
33            - const: gpio_mux
34  - if:
35      properties:
36        compatible:
37          contains:
38            enum:
39              - marvell,mmp-gpio
40              - marvell,mmp2-gpio
41    then:
42      properties:
43        interrupts:
44          maxItems: 1
45        interrupt-names:
46          items:
47            - const: gpio_mux
48
49properties:
50  $nodename:
51    pattern: '^gpio@[0-9a-f]+$'
52
53  compatible:
54    enum:
55      - intel,pxa25x-gpio
56      - intel,pxa26x-gpio
57      - intel,pxa27x-gpio
58      - intel,pxa3xx-gpio
59      - marvell,mmp-gpio
60      - marvell,mmp2-gpio
61      - marvell,pxa93x-gpio
62
63  reg:
64    maxItems: 1
65
66  clocks:
67    maxItems: 1
68
69  resets:
70    maxItems: 1
71
72  ranges: true
73
74  '#address-cells':
75    const: 1
76
77  '#size-cells':
78    const: 1
79
80  gpio-controller: true
81
82  '#gpio-cells':
83    const: 2
84
85  gpio-ranges: true
86
87  interrupts: true
88
89  interrupt-names: true
90
91  interrupt-controller: true
92
93  '#interrupt-cells':
94    const: 2
95
96patternProperties:
97  '^gpio@[0-9a-f]*$':
98    type: object
99    properties:
100      reg:
101        maxItems: 1
102
103    required:
104      - reg
105
106    additionalProperties: false
107
108required:
109  - compatible
110  - '#address-cells'
111  - '#size-cells'
112  - reg
113  - gpio-controller
114  - '#gpio-cells'
115  - interrupts
116  - interrupt-names
117  - interrupt-controller
118  - '#interrupt-cells'
119
120additionalProperties: false
121
122examples:
123  - |
124    #include <dt-bindings/clock/pxa-clock.h>
125    gpio@40e00000 {
126        compatible = "intel,pxa3xx-gpio";
127        #address-cells = <1>;
128        #size-cells = <1>;
129        reg = <0x40e00000 0x10000>;
130        gpio-controller;
131        #gpio-cells = <2>;
132        interrupts = <8>, <9>, <10>;
133        interrupt-names = "gpio0", "gpio1", "gpio_mux";
134        clocks = <&clks CLK_GPIO>;
135        interrupt-controller;
136        #interrupt-cells = <2>;
137    };
138  - |
139    #include <dt-bindings/clock/marvell,pxa910.h>
140    gpio@d4019000 {
141        compatible = "marvell,mmp-gpio";
142        #address-cells = <1>;
143        #size-cells = <1>;
144        reg = <0xd4019000 0x1000>;
145        gpio-controller;
146        #gpio-cells = <2>;
147        interrupts = <49>;
148        interrupt-names = "gpio_mux";
149        clocks = <&soc_clocks PXA910_CLK_GPIO>;
150        resets = <&soc_clocks PXA910_CLK_GPIO>;
151        interrupt-controller;
152        #interrupt-cells = <2>;
153        ranges;
154
155        gpio@d4019000 {
156            reg = <0xd4019000 0x4>;
157        };
158
159        gpio@d4019004 {
160            reg = <0xd4019004 0x4>;
161        };
162
163        gpio@d4019008 {
164            reg = <0xd4019008 0x4>;
165        };
166
167        gpio@d4019100 {
168            reg = <0xd4019100 0x4>;
169        };
170     };
171
172...
173