1* Renesas R-Car GyroADC device driver
2
3The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
4which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs
5are sampled by the GyroADC block in a round-robin fashion and the result
6presented in the GyroADC registers.
7
8Required properties:
9- compatible:	Should be "<soc-specific>", "renesas,rcar-gyroadc".
10                The <soc-specific> should be one of:
11		renesas,r8a7791-gyroadc - for the GyroADC block present
12					  in r8a7791 SoC
13		renesas,r8a7792-gyroadc - for the GyroADC with interrupt
14					  block present in r8a7792 SoC
15- reg:		Address and length of the register set for the device
16- clocks:	References to all the clocks specified in the clock-names
17		property as specified in
18		Documentation/devicetree/bindings/clock/clock-bindings.txt.
19- clock-names:	Shall contain "fck". The "fck" is the GyroADC block clock.
20- power-domains: Must contain a reference to the PM domain, if available.
21- #address-cells: Should be <1> (setting for the subnodes) for all ADCs
22		except for "fujitsu,mb88101a". Should be <0> (setting for
23		only subnode) for "fujitsu,mb88101a".
24- #size-cells:	Should be <0> (setting for the subnodes)
25
26Sub-nodes:
27You must define subnode(s) which select the connected ADC type and reference
28voltage for the GyroADC channels.
29
30Required properties for subnodes:
31- compatible:	Should be either of:
32		"fujitsu,mb88101a"
33			- Fujitsu MB88101A compatible mode,
34			  12bit sampling, up to 4 channels can be sampled in
35			  round-robin fashion. One Fujitsu chip supplies four
36			  GyroADC channels with data as it contains four ADCs
37			  on the chip and thus for 4-channel operation, single
38			  MB88101A is required. The Cx chipselect lines of the
39			  MB88101A connect directly to two CHS lines of the
40			  GyroADC, no demuxer is required. The data out line
41			  of each MB88101A connects to a shared input pin of
42			  the GyroADC.
43		"ti,adcs7476" or "ti,adc121" or "adi,ad7476"
44			- TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode,
45			  15bit sampling, up to 8 channels can be sampled in
46			  round-robin fashion. One TI/ADI chip supplies single
47			  ADC channel with data, thus for 8-channel operation,
48			  8 chips are required. A 3:8 chipselect demuxer is
49			  required to connect the nCS line of the TI/ADI chips
50			  to the GyroADC, while MISO line of each TI/ADI ADC
51			  connects to a shared input pin of the GyroADC.
52		"maxim,max1162" or "maxim,max11100"
53			- Maxim MAX1162 / Maxim MAX11100 compatible mode,
54			  16bit sampling, up to 8 channels can be sampled in
55			  round-robin fashion. One Maxim chip supplies single
56			  ADC channel with data, thus for 8-channel operation,
57			  8 chips are required. A 3:8 chipselect demuxer is
58			  required to connect the nCS line of the MAX chips
59			  to the GyroADC, while MISO line of each Maxim ADC
60			  connects to a shared input pin of the GyroADC.
61- reg:		Should be the number of the analog input. Should be present
62		for all ADCs except "fujitsu,mb88101a".
63- vref-supply:	Reference to the channel reference voltage regulator.
64
65Example:
66	vref_max1162: regulator-vref-max1162 {
67		compatible = "regulator-fixed";
68
69		regulator-name = "MAX1162 Vref";
70		regulator-min-microvolt = <4096000>;
71		regulator-max-microvolt = <4096000>;
72	};
73
74	adc@e6e54000 {
75		compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
76		reg = <0 0xe6e54000 0 64>;
77		clocks = <&mstp9_clks R8A7791_CLK_GYROADC>;
78		clock-names = "fck";
79		power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
80
81		pinctrl-0 = <&adc_pins>;
82		pinctrl-names = "default";
83
84		#address-cells = <1>;
85		#size-cells = <0>;
86
87		adc@0 {
88			reg = <0>;
89			compatible = "maxim,max1162";
90			vref-supply = <&vref_max1162>;
91		};
92
93		adc@1 {
94			reg = <1>;
95			compatible = "maxim,max1162";
96			vref-supply = <&vref_max1162>;
97		};
98	};
99