1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car GyroADC
8
9maintainers:
10  - Marek Vasut <marek.vasut+renesas@gmail.com>
11
12description: |
13  The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
14  which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs
15  are sampled by the GyroADC block in a round-robin fashion and the result
16  presented in the GyroADC registers.
17  The ADC bindings should match with that of the devices connected to a
18  full featured SPI bus.
19
20properties:
21  compatible:
22    items:
23      - enum:
24          - renesas,r8a7791-gyroadc
25          - renesas,r8a7792-gyroadc
26      - const: renesas,rcar-gyroadc
27
28  reg:
29    maxItems: 1
30
31  clocks:
32    maxItems: 1
33
34  clock-names:
35    const: fck
36
37  power-domains: true
38
39  resets: true
40
41  "#address-cells":
42    const: 1
43
44  "#size-cells":
45    const: 0
46
47additionalProperties: false
48
49required:
50  - compatible
51  - reg
52  - clocks
53  - clock-names
54  - "#address-cells"
55  - "#size-cells"
56
57patternProperties:
58  "@[0-7]$":
59    type: object
60    properties:
61      compatible:
62        description: |
63          fujitsu,mb88101a
64          - Fujitsu MB88101A compatible mode,
65            12bit sampling, up to 4 channels can be sampled in round-robin
66            fashion. One Fujitsu chip supplies four GyroADC channels with
67            data as it contains four ADCs on the chip and thus for 4-channel
68            operation, single MB88101A is required. The Cx chipselect lines
69            of the MB88101A connect directly to two CHS lines of the GyroADC,
70            no demuxer is required. The data out line of each MB88101A
71            connects to a shared input pin of the GyroADC.
72          ti,adcs7476 or ti,adc121 or adi,ad7476
73          - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode, 15bit
74            sampling, up to 8 channels can be sampled in round-robin
75            fashion. One TI/ADI chip supplies single ADC channel with data,
76            thus for 8-channel operation, 8 chips are required.
77            A 3:8 chipselect demuxer is  required to connect the nCS line
78            of the TI/ADI chips to the GyroADC, while MISO line of each
79            TI/ADI ADC connects to a shared input pin of the GyroADC.
80          maxim,max1162 or maxim,max11100
81          - Maxim MAX1162 / Maxim MAX11100 compatible mode,  16bit sampling,
82            up to 8 channels can be sampled in round-robin fashion. One
83            Maxim chip supplies single ADC channel with data, thus for
84            8-channel operation, 8 chips are required.
85            A 3:8 chipselect demuxer is required to connect the nCS line
86            of the MAX chips to the GyroADC, while MISO line of each Maxim
87            ADC connects to a shared input pin of the GyroADC.
88        enum:
89          - adi,7476
90          - fujitsu,mb88101a
91          - maxim,max1162
92          - maxim,max11100
93          - ti,adcs7476
94          - ti,adc121
95
96      reg:
97        minimum: 0
98        maximum: 7
99
100      vref-supply: true
101
102    additionalProperties: false
103
104    required:
105      - compatible
106      - reg
107      - vref-supply
108
109examples:
110  - |
111    #include <dt-bindings/clock/r8a7791-clock.h>
112    #include <dt-bindings/power/r8a7791-sysc.h>
113    soc {
114        #address-cells = <2>;
115        #size-cells = <2>;
116
117        adc@e6e54000 {
118            compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
119            reg = <0 0xe6e54000 0 64>;
120            clocks = <&mstp9_clks R8A7791_CLK_GYROADC>;
121            clock-names = "fck";
122            power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
123
124            pinctrl-0 = <&adc_pins>;
125            pinctrl-names = "default";
126
127            #address-cells = <1>;
128            #size-cells = <0>;
129
130            adc@0 {
131                reg = <0>;
132                compatible = "maxim,max1162";
133                vref-supply = <&vref_max1162>;
134            };
135
136            adc@1 {
137                reg = <1>;
138                compatible = "maxim,max1162";
139                vref-supply = <&vref_max1162>;
140            };
141        };
142    };
143...
144