1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Marvell MMP/Orion Interrupt controller bindings 8 9maintainers: 10 - Andrew Lunn <andrew@lunn.ch> 11 - Gregory Clement <gregory.clement@bootlin.com> 12 13allOf: 14 - if: 15 properties: 16 compatible: 17 not: 18 contains: 19 const: marvell,orion-intc 20 then: 21 required: 22 - mrvl,intc-nr-irqs 23 - if: 24 properties: 25 compatible: 26 contains: 27 enum: 28 - mrvl,mmp-intc 29 - mrvl,mmp2-intc 30 then: 31 properties: 32 reg: 33 maxItems: 1 34 - if: 35 properties: 36 compatible: 37 contains: 38 enum: 39 - marvell,mmp3-intc 40 - mrvl,mmp2-mux-intc 41 then: 42 properties: 43 reg: 44 minItems: 2 45 - if: 46 properties: 47 compatible: 48 contains: 49 const: mrvl,mmp2-mux-intc 50 then: 51 properties: 52 interrupts: 53 maxItems: 1 54 reg-names: 55 items: 56 - const: 'mux status' 57 - const: 'mux mask' 58 required: 59 - interrupts 60 else: 61 properties: 62 interrupts: false 63 64properties: 65 '#interrupt-cells': 66 const: 1 67 68 compatible: 69 enum: 70 - mrvl,mmp-intc 71 - mrvl,mmp2-intc 72 - marvell,mmp3-intc 73 - marvell,orion-intc 74 - mrvl,mmp2-mux-intc 75 76 reg: 77 minItems: 1 78 maxItems: 2 79 80 reg-names: true 81 82 interrupts: true 83 84 interrupt-controller: true 85 86 mrvl,intc-nr-irqs: 87 description: | 88 Specifies the number of interrupts in the interrupt controller. 89 $ref: /schemas/types.yaml#/definitions/uint32 90 91 mrvl,clr-mfp-irq: 92 description: | 93 Specifies the interrupt that needs to clear MFP edge detection first. 94 $ref: /schemas/types.yaml#/definitions/uint32 95 96required: 97 - '#interrupt-cells' 98 - compatible 99 - reg 100 - interrupt-controller 101 102additionalProperties: false 103 104examples: 105 - | 106 interrupt-controller@d4282000 { 107 compatible = "mrvl,mmp2-intc"; 108 interrupt-controller; 109 #interrupt-cells = <1>; 110 reg = <0xd4282000 0x1000>; 111 mrvl,intc-nr-irqs = <64>; 112 }; 113 114 interrupt-controller@d4282150 { 115 compatible = "mrvl,mmp2-mux-intc"; 116 interrupts = <4>; 117 interrupt-controller; 118 #interrupt-cells = <1>; 119 reg = <0x150 0x4>, <0x168 0x4>; 120 reg-names = "mux status", "mux mask"; 121 mrvl,intc-nr-irqs = <2>; 122 }; 123 - | 124 interrupt-controller@fed20204 { 125 compatible = "marvell,orion-intc"; 126 interrupt-controller; 127 #interrupt-cells = <1>; 128 reg = <0xfed20204 0x04>, 129 <0xfed20214 0x04>; 130 }; 131 132... 133