1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-mipi-csi2.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A83T MIPI CSI-2
8
9maintainers:
10  - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
11
12properties:
13  compatible:
14    const: allwinner,sun8i-a83t-mipi-csi2
15
16  reg:
17    maxItems: 1
18
19  interrupts:
20    maxItems: 1
21
22  clocks:
23    items:
24      - description: Bus Clock
25      - description: Module Clock
26      - description: MIPI-specific Clock
27      - description: Misc CSI Clock
28
29  clock-names:
30    items:
31      - const: bus
32      - const: mod
33      - const: mipi
34      - const: misc
35
36  resets:
37    maxItems: 1
38
39  ports:
40    $ref: /schemas/graph.yaml#/properties/ports
41
42    properties:
43      port@0:
44        $ref: /schemas/graph.yaml#/$defs/port-base
45        description: Input port, connect to a MIPI CSI-2 sensor
46
47        properties:
48          reg:
49            const: 0
50
51          endpoint:
52            $ref: video-interfaces.yaml#
53            unevaluatedProperties: false
54
55            properties:
56              data-lanes:
57                minItems: 1
58                maxItems: 4
59
60            required:
61              - data-lanes
62
63        unevaluatedProperties: false
64
65      port@1:
66        $ref: /schemas/graph.yaml#/properties/port
67        description: Output port, connect to a CSI controller
68
69    required:
70      - port@0
71      - port@1
72
73required:
74  - compatible
75  - reg
76  - interrupts
77  - clocks
78  - clock-names
79  - resets
80  - ports
81
82additionalProperties: false
83
84examples:
85  - |
86    #include <dt-bindings/interrupt-controller/arm-gic.h>
87    #include <dt-bindings/clock/sun8i-a83t-ccu.h>
88    #include <dt-bindings/reset/sun8i-a83t-ccu.h>
89
90    mipi_csi2: csi@1cb1000 {
91        compatible = "allwinner,sun8i-a83t-mipi-csi2";
92        reg = <0x01cb1000 0x1000>;
93        interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
94        clocks = <&ccu CLK_BUS_CSI>,
95                 <&ccu CLK_CSI_SCLK>,
96                 <&ccu CLK_MIPI_CSI>,
97                 <&ccu CLK_CSI_MISC>;
98        clock-names = "bus", "mod", "mipi", "misc";
99        resets = <&ccu RST_BUS_CSI>;
100
101        ports {
102            #address-cells = <1>;
103            #size-cells = <0>;
104
105            mipi_csi2_in: port@0 {
106                reg = <0>;
107
108                mipi_csi2_in_ov8865: endpoint {
109                    data-lanes = <1 2 3 4>;
110
111                    remote-endpoint = <&ov8865_out_mipi_csi2>;
112                };
113            };
114
115            mipi_csi2_out: port@1 {
116                reg = <1>;
117
118                mipi_csi2_out_csi: endpoint {
119                    remote-endpoint = <&csi_in_mipi_csi2>;
120                };
121            };
122        };
123    };
124
125...
126