1*8bab661aSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*8bab661aSEmmanuel Vadot%YAML 1.2 3*8bab661aSEmmanuel Vadot--- 4*8bab661aSEmmanuel Vadot$id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegdec.yaml# 5*8bab661aSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*8bab661aSEmmanuel Vadot 7*8bab661aSEmmanuel Vadottitle: MediaTek JPEG Decoder 8*8bab661aSEmmanuel Vadot 9*8bab661aSEmmanuel Vadotmaintainers: 10*8bab661aSEmmanuel Vadot - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com> 11*8bab661aSEmmanuel Vadot 12*8bab661aSEmmanuel Vadotdescription: 13*8bab661aSEmmanuel Vadot MediaTek JPEG Decoder is the JPEG decode hardware present in MediaTek SoCs 14*8bab661aSEmmanuel Vadot 15*8bab661aSEmmanuel Vadotproperties: 16*8bab661aSEmmanuel Vadot compatible: 17*8bab661aSEmmanuel Vadot const: mediatek,mt8195-jpgdec 18*8bab661aSEmmanuel Vadot 19*8bab661aSEmmanuel Vadot power-domains: 20*8bab661aSEmmanuel Vadot maxItems: 1 21*8bab661aSEmmanuel Vadot 22*8bab661aSEmmanuel Vadot iommus: 23*8bab661aSEmmanuel Vadot maxItems: 6 24*8bab661aSEmmanuel Vadot description: 25*8bab661aSEmmanuel Vadot Points to the respective IOMMU block with master port as argument, see 26*8bab661aSEmmanuel Vadot Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. 27*8bab661aSEmmanuel Vadot Ports are according to the HW. 28*8bab661aSEmmanuel Vadot 29*8bab661aSEmmanuel Vadot "#address-cells": 30*8bab661aSEmmanuel Vadot const: 2 31*8bab661aSEmmanuel Vadot 32*8bab661aSEmmanuel Vadot "#size-cells": 33*8bab661aSEmmanuel Vadot const: 2 34*8bab661aSEmmanuel Vadot 35*8bab661aSEmmanuel Vadot ranges: true 36*8bab661aSEmmanuel Vadot 37*8bab661aSEmmanuel Vadot# Required child node: 38*8bab661aSEmmanuel VadotpatternProperties: 39*8bab661aSEmmanuel Vadot "^jpgdec@[0-9a-f]+$": 40*8bab661aSEmmanuel Vadot type: object 41*8bab661aSEmmanuel Vadot description: 42*8bab661aSEmmanuel Vadot The jpeg decoder hardware device node which should be added as subnodes to 43*8bab661aSEmmanuel Vadot the main jpeg node. 44*8bab661aSEmmanuel Vadot 45*8bab661aSEmmanuel Vadot properties: 46*8bab661aSEmmanuel Vadot compatible: 47*8bab661aSEmmanuel Vadot const: mediatek,mt8195-jpgdec-hw 48*8bab661aSEmmanuel Vadot 49*8bab661aSEmmanuel Vadot reg: 50*8bab661aSEmmanuel Vadot maxItems: 1 51*8bab661aSEmmanuel Vadot 52*8bab661aSEmmanuel Vadot iommus: 53*8bab661aSEmmanuel Vadot minItems: 1 54*8bab661aSEmmanuel Vadot maxItems: 32 55*8bab661aSEmmanuel Vadot description: 56*8bab661aSEmmanuel Vadot List of the hardware port in respective IOMMU block for current Socs. 57*8bab661aSEmmanuel Vadot Refer to bindings/iommu/mediatek,iommu.yaml. 58*8bab661aSEmmanuel Vadot 59*8bab661aSEmmanuel Vadot interrupts: 60*8bab661aSEmmanuel Vadot maxItems: 1 61*8bab661aSEmmanuel Vadot 62*8bab661aSEmmanuel Vadot clocks: 63*8bab661aSEmmanuel Vadot maxItems: 1 64*8bab661aSEmmanuel Vadot 65*8bab661aSEmmanuel Vadot clock-names: 66*8bab661aSEmmanuel Vadot items: 67*8bab661aSEmmanuel Vadot - const: jpgdec 68*8bab661aSEmmanuel Vadot 69*8bab661aSEmmanuel Vadot power-domains: 70*8bab661aSEmmanuel Vadot maxItems: 1 71*8bab661aSEmmanuel Vadot 72*8bab661aSEmmanuel Vadot required: 73*8bab661aSEmmanuel Vadot - compatible 74*8bab661aSEmmanuel Vadot - reg 75*8bab661aSEmmanuel Vadot - iommus 76*8bab661aSEmmanuel Vadot - interrupts 77*8bab661aSEmmanuel Vadot - clocks 78*8bab661aSEmmanuel Vadot - clock-names 79*8bab661aSEmmanuel Vadot - power-domains 80*8bab661aSEmmanuel Vadot 81*8bab661aSEmmanuel Vadot additionalProperties: false 82*8bab661aSEmmanuel Vadot 83*8bab661aSEmmanuel Vadotrequired: 84*8bab661aSEmmanuel Vadot - compatible 85*8bab661aSEmmanuel Vadot - power-domains 86*8bab661aSEmmanuel Vadot - iommus 87*8bab661aSEmmanuel Vadot - ranges 88*8bab661aSEmmanuel Vadot 89*8bab661aSEmmanuel VadotadditionalProperties: false 90*8bab661aSEmmanuel Vadot 91*8bab661aSEmmanuel Vadotexamples: 92*8bab661aSEmmanuel Vadot - | 93*8bab661aSEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 94*8bab661aSEmmanuel Vadot #include <dt-bindings/memory/mt8195-memory-port.h> 95*8bab661aSEmmanuel Vadot #include <dt-bindings/interrupt-controller/irq.h> 96*8bab661aSEmmanuel Vadot #include <dt-bindings/clock/mt8195-clk.h> 97*8bab661aSEmmanuel Vadot #include <dt-bindings/power/mt8195-power.h> 98*8bab661aSEmmanuel Vadot 99*8bab661aSEmmanuel Vadot soc { 100*8bab661aSEmmanuel Vadot #address-cells = <2>; 101*8bab661aSEmmanuel Vadot #size-cells = <2>; 102*8bab661aSEmmanuel Vadot 103*8bab661aSEmmanuel Vadot jpgdec-master { 104*8bab661aSEmmanuel Vadot compatible = "mediatek,mt8195-jpgdec"; 105*8bab661aSEmmanuel Vadot power-domains = <&spm MT8195_POWER_DOMAIN_VDEC1>; 106*8bab661aSEmmanuel Vadot iommus = <&iommu_vpp M4U_PORT_L19_JPGDEC_WDMA0>, 107*8bab661aSEmmanuel Vadot <&iommu_vpp M4U_PORT_L19_JPGDEC_BSDMA0>, 108*8bab661aSEmmanuel Vadot <&iommu_vpp M4U_PORT_L19_JPGDEC_WDMA1>, 109*8bab661aSEmmanuel Vadot <&iommu_vpp M4U_PORT_L19_JPGDEC_BSDMA1>, 110*8bab661aSEmmanuel Vadot <&iommu_vpp M4U_PORT_L19_JPGDEC_BUFF_OFFSET1>, 111*8bab661aSEmmanuel Vadot <&iommu_vpp M4U_PORT_L19_JPGDEC_BUFF_OFFSET0>; 112*8bab661aSEmmanuel Vadot #address-cells = <2>; 113*8bab661aSEmmanuel Vadot #size-cells = <2>; 114*8bab661aSEmmanuel Vadot ranges; 115*8bab661aSEmmanuel Vadot 116*8bab661aSEmmanuel Vadot jpgdec@1a040000 { 117*8bab661aSEmmanuel Vadot compatible = "mediatek,mt8195-jpgdec-hw"; 118*8bab661aSEmmanuel Vadot reg = <0 0x1a040000 0 0x10000>;/* JPGDEC_C0 */ 119*8bab661aSEmmanuel Vadot iommus = <&iommu_vdo M4U_PORT_L19_JPGDEC_WDMA0>, 120*8bab661aSEmmanuel Vadot <&iommu_vdo M4U_PORT_L19_JPGDEC_BSDMA0>, 121*8bab661aSEmmanuel Vadot <&iommu_vdo M4U_PORT_L19_JPGDEC_WDMA1>, 122*8bab661aSEmmanuel Vadot <&iommu_vdo M4U_PORT_L19_JPGDEC_BSDMA1>, 123*8bab661aSEmmanuel Vadot <&iommu_vdo M4U_PORT_L19_JPGDEC_BUFF_OFFSET1>, 124*8bab661aSEmmanuel Vadot <&iommu_vdo M4U_PORT_L19_JPGDEC_BUFF_OFFSET0>; 125*8bab661aSEmmanuel Vadot interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0>; 126*8bab661aSEmmanuel Vadot clocks = <&vencsys CLK_VENC_JPGDEC>; 127*8bab661aSEmmanuel Vadot clock-names = "jpgdec"; 128*8bab661aSEmmanuel Vadot power-domains = <&spm MT8195_POWER_DOMAIN_VDEC0>; 129*8bab661aSEmmanuel Vadot }; 130*8bab661aSEmmanuel Vadot 131*8bab661aSEmmanuel Vadot jpgdec@1a050000 { 132*8bab661aSEmmanuel Vadot compatible = "mediatek,mt8195-jpgdec-hw"; 133*8bab661aSEmmanuel Vadot reg = <0 0x1a050000 0 0x10000>;/* JPGDEC_C1 */ 134*8bab661aSEmmanuel Vadot iommus = <&iommu_vdo M4U_PORT_L19_JPGDEC_WDMA0>, 135*8bab661aSEmmanuel Vadot <&iommu_vdo M4U_PORT_L19_JPGDEC_BSDMA0>, 136*8bab661aSEmmanuel Vadot <&iommu_vdo M4U_PORT_L19_JPGDEC_WDMA1>, 137*8bab661aSEmmanuel Vadot <&iommu_vdo M4U_PORT_L19_JPGDEC_BSDMA1>, 138*8bab661aSEmmanuel Vadot <&iommu_vdo M4U_PORT_L19_JPGDEC_BUFF_OFFSET1>, 139*8bab661aSEmmanuel Vadot <&iommu_vdo M4U_PORT_L19_JPGDEC_BUFF_OFFSET0>; 140*8bab661aSEmmanuel Vadot interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 0>; 141*8bab661aSEmmanuel Vadot clocks = <&vencsys CLK_VENC_JPGDEC_C1>; 142*8bab661aSEmmanuel Vadot clock-names = "jpgdec"; 143*8bab661aSEmmanuel Vadot power-domains = <&spm MT8195_POWER_DOMAIN_VDEC1>; 144*8bab661aSEmmanuel Vadot }; 145*8bab661aSEmmanuel Vadot 146*8bab661aSEmmanuel Vadot jpgdec@1b040000 { 147*8bab661aSEmmanuel Vadot compatible = "mediatek,mt8195-jpgdec-hw"; 148*8bab661aSEmmanuel Vadot reg = <0 0x1b040000 0 0x10000>;/* JPGDEC_C2 */ 149*8bab661aSEmmanuel Vadot iommus = <&iommu_vpp M4U_PORT_L20_JPGDEC_WDMA0>, 150*8bab661aSEmmanuel Vadot <&iommu_vpp M4U_PORT_L20_JPGDEC_BSDMA0>, 151*8bab661aSEmmanuel Vadot <&iommu_vpp M4U_PORT_L20_JPGDEC_WDMA1>, 152*8bab661aSEmmanuel Vadot <&iommu_vpp M4U_PORT_L20_JPGDEC_BSDMA1>, 153*8bab661aSEmmanuel Vadot <&iommu_vpp M4U_PORT_L20_JPGDEC_BUFF_OFFSET1>, 154*8bab661aSEmmanuel Vadot <&iommu_vpp M4U_PORT_L20_JPGDEC_BUFF_OFFSET0>; 155*8bab661aSEmmanuel Vadot interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 0>; 156*8bab661aSEmmanuel Vadot clocks = <&vencsys_core1 CLK_VENC_CORE1_JPGDEC>; 157*8bab661aSEmmanuel Vadot clock-names = "jpgdec"; 158*8bab661aSEmmanuel Vadot power-domains = <&spm MT8195_POWER_DOMAIN_VDEC2>; 159*8bab661aSEmmanuel Vadot }; 160*8bab661aSEmmanuel Vadot }; 161*8bab661aSEmmanuel Vadot }; 162