1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Qualcomm CAMSS ISP
9
10maintainers:
11  - Robert Foss <robert.foss@linaro.org>
12  - Todor Tomov <todor.too@gmail.com>
13
14description: |
15  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
16
17properties:
18  compatible:
19    const: qcom,msm8916-camss
20
21  clocks:
22    minItems: 19
23    maxItems: 19
24
25  clock-names:
26    items:
27      - const: top_ahb
28      - const: ispif_ahb
29      - const: csiphy0_timer
30      - const: csiphy1_timer
31      - const: csi0_ahb
32      - const: csi0
33      - const: csi0_phy
34      - const: csi0_pix
35      - const: csi0_rdi
36      - const: csi1_ahb
37      - const: csi1
38      - const: csi1_phy
39      - const: csi1_pix
40      - const: csi1_rdi
41      - const: ahb
42      - const: vfe0
43      - const: csi_vfe0
44      - const: vfe_ahb
45      - const: vfe_axi
46
47  interrupts:
48    minItems: 6
49    maxItems: 6
50
51  interrupt-names:
52    items:
53      - const: csiphy0
54      - const: csiphy1
55      - const: csid0
56      - const: csid1
57      - const: ispif
58      - const: vfe0
59
60  iommus:
61    maxItems: 1
62
63  power-domains:
64    items:
65      - description: VFE GDSC - Video Front End, Global Distributed Switch Controller.
66
67  ports:
68    $ref: /schemas/graph.yaml#/properties/ports
69
70    description:
71      CSI input ports.
72
73    properties:
74      port@0:
75        $ref: /schemas/graph.yaml#/$defs/port-base
76        unevaluatedProperties: false
77        description:
78          Input port for receiving CSI data.
79
80        properties:
81          endpoint:
82            $ref: video-interfaces.yaml#
83            unevaluatedProperties: false
84
85            properties:
86              clock-lanes:
87                items:
88                  - const: 1
89
90              data-lanes:
91                description:
92                  An array of physical data lanes indexes.
93                  Position of an entry determines the logical
94                  lane number, while the value of an entry
95                  indicates physical lane index. Lane swapping
96                  is supported. Physical lane indexes;
97                  0, 2, 3, 4.
98                minItems: 1
99                maxItems: 4
100
101            required:
102              - clock-lanes
103              - data-lanes
104
105      port@1:
106        $ref: /schemas/graph.yaml#/$defs/port-base
107        unevaluatedProperties: false
108        description:
109          Input port for receiving CSI data.
110
111        properties:
112          endpoint:
113            $ref: video-interfaces.yaml#
114            unevaluatedProperties: false
115
116            properties:
117              clock-lanes:
118                items:
119                  - const: 1
120
121              data-lanes:
122                minItems: 1
123                maxItems: 4
124
125            required:
126              - clock-lanes
127              - data-lanes
128
129  reg:
130    minItems: 9
131    maxItems: 9
132
133  reg-names:
134    items:
135      - const: csiphy0
136      - const: csiphy0_clk_mux
137      - const: csiphy1
138      - const: csiphy1_clk_mux
139      - const: csid0
140      - const: csid1
141      - const: ispif
142      - const: csi_clk_mux
143      - const: vfe0
144
145  vdda-supply:
146    description:
147      Definition of the regulator used as analog power supply.
148
149required:
150  - clock-names
151  - clocks
152  - compatible
153  - interrupt-names
154  - interrupts
155  - iommus
156  - power-domains
157  - reg
158  - reg-names
159  - vdda-supply
160
161additionalProperties: false
162
163examples:
164  - |
165    #include <dt-bindings/interrupt-controller/arm-gic.h>
166    #include <dt-bindings/clock/qcom,gcc-msm8916.h>
167
168    camss: camss@1b00000 {
169      compatible = "qcom,msm8916-camss";
170
171      clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
172        <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
173        <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
174        <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
175        <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
176        <&gcc GCC_CAMSS_CSI0_CLK>,
177        <&gcc GCC_CAMSS_CSI0PHY_CLK>,
178        <&gcc GCC_CAMSS_CSI0PIX_CLK>,
179        <&gcc GCC_CAMSS_CSI0RDI_CLK>,
180        <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
181        <&gcc GCC_CAMSS_CSI1_CLK>,
182        <&gcc GCC_CAMSS_CSI1PHY_CLK>,
183        <&gcc GCC_CAMSS_CSI1PIX_CLK>,
184        <&gcc GCC_CAMSS_CSI1RDI_CLK>,
185        <&gcc GCC_CAMSS_AHB_CLK>,
186        <&gcc GCC_CAMSS_VFE0_CLK>,
187        <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
188        <&gcc GCC_CAMSS_VFE_AHB_CLK>,
189        <&gcc GCC_CAMSS_VFE_AXI_CLK>;
190
191      clock-names = "top_ahb",
192        "ispif_ahb",
193        "csiphy0_timer",
194        "csiphy1_timer",
195        "csi0_ahb",
196        "csi0",
197        "csi0_phy",
198        "csi0_pix",
199        "csi0_rdi",
200        "csi1_ahb",
201        "csi1",
202        "csi1_phy",
203        "csi1_pix",
204        "csi1_rdi",
205        "ahb",
206        "vfe0",
207        "csi_vfe0",
208        "vfe_ahb",
209        "vfe_axi";
210
211      interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
212        <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
213        <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
214        <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
215        <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
216        <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
217
218      interrupt-names = "csiphy0",
219        "csiphy1",
220        "csid0",
221        "csid1",
222        "ispif",
223        "vfe0";
224
225      iommus = <&apps_iommu 3>;
226
227      power-domains = <&gcc VFE_GDSC>;
228
229      reg = <0x01b0ac00 0x200>,
230        <0x01b00030 0x4>,
231        <0x01b0b000 0x200>,
232        <0x01b00038 0x4>,
233        <0x01b08000 0x100>,
234        <0x01b08400 0x100>,
235        <0x01b0a000 0x500>,
236        <0x01b00020 0x10>,
237        <0x01b10000 0x1000>;
238
239      reg-names = "csiphy0",
240        "csiphy0_clk_mux",
241        "csiphy1",
242        "csiphy1_clk_mux",
243        "csid0",
244        "csid1",
245        "ispif",
246        "csi_clk_mux",
247        "vfe0";
248
249      vdda-supply = <&reg_2v8>;
250
251      ports {
252        #address-cells = <1>;
253        #size-cells = <0>;
254      };
255
256    };
257