1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8996 Venus video encode and decode accelerators
8
9maintainers:
10  - Stanimir Varbanov <stanimir.varbanov@linaro.org>
11
12description: |
13  The Venus IP is a video encode and decode accelerator present
14  on Qualcomm platforms
15
16allOf:
17  - $ref: qcom,venus-common.yaml#
18
19properties:
20  compatible:
21    const: qcom,msm8996-venus
22
23  power-domains:
24    maxItems: 1
25
26  clocks:
27    maxItems: 4
28
29  clock-names:
30    items:
31      - const: core
32      - const: iface
33      - const: bus
34      - const: mbus
35
36  interconnects:
37    maxItems: 2
38
39  interconnect-names:
40    items:
41      - const: video-mem
42      - const: cpu-cfg
43
44  iommus:
45    maxItems: 20
46
47  video-decoder:
48    type: object
49
50    properties:
51      compatible:
52        const: venus-decoder
53
54      clocks:
55        maxItems: 1
56
57      clock-names:
58        items:
59          - const: core
60
61      power-domains:
62        maxItems: 1
63
64    required:
65      - compatible
66      - clocks
67      - clock-names
68      - power-domains
69
70    additionalProperties: false
71
72  video-encoder:
73    type: object
74
75    properties:
76      compatible:
77        const: venus-encoder
78
79      clocks:
80        maxItems: 1
81
82      clock-names:
83        items:
84          - const: core
85
86      power-domains:
87        maxItems: 1
88
89    required:
90      - compatible
91      - clocks
92      - clock-names
93      - power-domains
94
95    additionalProperties: false
96
97required:
98  - compatible
99  - iommus
100  - video-decoder
101  - video-encoder
102
103unevaluatedProperties: false
104
105examples:
106  - |
107    #include <dt-bindings/interrupt-controller/arm-gic.h>
108    #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
109
110    video-codec@c00000 {
111        compatible = "qcom,msm8996-venus";
112        reg = <0x00c00000 0xff000>;
113        interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
114        clocks = <&mmcc VIDEO_CORE_CLK>,
115                 <&mmcc VIDEO_AHB_CLK>,
116                 <&mmcc VIDEO_AXI_CLK>,
117                 <&mmcc VIDEO_MAXI_CLK>;
118        clock-names = "core", "iface", "bus", "mbus";
119        power-domains = <&mmcc VENUS_GDSC>;
120        iommus =  <&venus_smmu 0x00>,
121                  <&venus_smmu 0x01>,
122                  <&venus_smmu 0x0a>,
123                  <&venus_smmu 0x07>,
124                  <&venus_smmu 0x0e>,
125                  <&venus_smmu 0x0f>,
126                  <&venus_smmu 0x08>,
127                  <&venus_smmu 0x09>,
128                  <&venus_smmu 0x0b>,
129                  <&venus_smmu 0x0c>,
130                  <&venus_smmu 0x0d>,
131                  <&venus_smmu 0x10>,
132                  <&venus_smmu 0x11>,
133                  <&venus_smmu 0x21>,
134                  <&venus_smmu 0x28>,
135                  <&venus_smmu 0x29>,
136                  <&venus_smmu 0x2b>,
137                  <&venus_smmu 0x2c>,
138                  <&venus_smmu 0x2d>,
139                  <&venus_smmu 0x31>;
140        memory-region = <&venus_mem>;
141
142        video-decoder {
143            compatible = "venus-decoder";
144            clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
145            clock-names = "core";
146            power-domains = <&mmcc VENUS_CORE0_GDSC>;
147        };
148
149        video-encoder {
150            compatible = "venus-encoder";
151            clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
152            clock-names = "core";
153            power-domains = <&mmcc VENUS_CORE1_GDSC>;
154        };
155    };
156