1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Qualcomm CAMSS ISP
9
10maintainers:
11  - Robert Foss <robert.foss@linaro.org>
12  - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13
14description: |
15  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
16
17properties:
18  compatible:
19    const: qcom,sdm660-camss
20
21  clocks:
22    minItems: 42
23    maxItems: 42
24
25  clock-names:
26    items:
27      - const: ahb
28      - const: cphy_csid0
29      - const: cphy_csid1
30      - const: cphy_csid2
31      - const: cphy_csid3
32      - const: csi0_ahb
33      - const: csi0
34      - const: csi0_phy
35      - const: csi0_pix
36      - const: csi0_rdi
37      - const: csi1_ahb
38      - const: csi1
39      - const: csi1_phy
40      - const: csi1_pix
41      - const: csi1_rdi
42      - const: csi2_ahb
43      - const: csi2
44      - const: csi2_phy
45      - const: csi2_pix
46      - const: csi2_rdi
47      - const: csi3_ahb
48      - const: csi3
49      - const: csi3_phy
50      - const: csi3_pix
51      - const: csi3_rdi
52      - const: csiphy0_timer
53      - const: csiphy1_timer
54      - const: csiphy2_timer
55      - const: csiphy_ahb2crif
56      - const: csi_vfe0
57      - const: csi_vfe1
58      - const: ispif_ahb
59      - const: throttle_axi
60      - const: top_ahb
61      - const: vfe0_ahb
62      - const: vfe0
63      - const: vfe0_stream
64      - const: vfe1_ahb
65      - const: vfe1
66      - const: vfe1_stream
67      - const: vfe_ahb
68      - const: vfe_axi
69
70  interrupts:
71    minItems: 10
72    maxItems: 10
73
74  interrupt-names:
75    items:
76      - const: csid0
77      - const: csid1
78      - const: csid2
79      - const: csid3
80      - const: csiphy0
81      - const: csiphy1
82      - const: csiphy2
83      - const: ispif
84      - const: vfe0
85      - const: vfe1
86
87  iommus:
88    maxItems: 4
89
90  power-domains:
91    items:
92      - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
93      - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
94
95  ports:
96    $ref: /schemas/graph.yaml#/properties/ports
97
98    description:
99      CSI input ports.
100
101    properties:
102      port@0:
103        $ref: /schemas/graph.yaml#/$defs/port-base
104        unevaluatedProperties: false
105        description:
106          Input port for receiving CSI data.
107
108        properties:
109          endpoint:
110            $ref: video-interfaces.yaml#
111            unevaluatedProperties: false
112
113            properties:
114              clock-lanes:
115                items:
116                  - const: 7
117
118              data-lanes:
119                minItems: 1
120                maxItems: 4
121
122            required:
123              - clock-lanes
124              - data-lanes
125
126      port@1:
127        $ref: /schemas/graph.yaml#/$defs/port-base
128        unevaluatedProperties: false
129        description:
130          Input port for receiving CSI data.
131
132        properties:
133          endpoint:
134            $ref: video-interfaces.yaml#
135            unevaluatedProperties: false
136
137            properties:
138              clock-lanes:
139                items:
140                  - const: 7
141
142              data-lanes:
143                minItems: 1
144                maxItems: 4
145
146            required:
147              - clock-lanes
148              - data-lanes
149
150      port@2:
151        $ref: /schemas/graph.yaml#/$defs/port-base
152        unevaluatedProperties: false
153        description:
154          Input port for receiving CSI data.
155
156        properties:
157          endpoint:
158            $ref: video-interfaces.yaml#
159            unevaluatedProperties: false
160
161            properties:
162              clock-lanes:
163                items:
164                  - const: 7
165
166              data-lanes:
167                minItems: 1
168                maxItems: 4
169
170            required:
171              - clock-lanes
172              - data-lanes
173
174      port@3:
175        $ref: /schemas/graph.yaml#/$defs/port-base
176        unevaluatedProperties: false
177        description:
178          Input port for receiving CSI data.
179
180        properties:
181          endpoint:
182            $ref: video-interfaces.yaml#
183            unevaluatedProperties: false
184
185            properties:
186              clock-lanes:
187                items:
188                  - const: 7
189
190              data-lanes:
191                minItems: 1
192                maxItems: 4
193
194            required:
195              - clock-lanes
196              - data-lanes
197
198  reg:
199    minItems: 14
200    maxItems: 14
201
202  reg-names:
203    items:
204      - const: csi_clk_mux
205      - const: csid0
206      - const: csid1
207      - const: csid2
208      - const: csid3
209      - const: csiphy0
210      - const: csiphy0_clk_mux
211      - const: csiphy1
212      - const: csiphy1_clk_mux
213      - const: csiphy2
214      - const: csiphy2_clk_mux
215      - const: ispif
216      - const: vfe0
217      - const: vfe1
218
219  vdda-supply:
220    description:
221      Definition of the regulator used as analog power supply.
222
223required:
224  - clock-names
225  - clocks
226  - compatible
227  - interrupt-names
228  - interrupts
229  - iommus
230  - power-domains
231  - reg
232  - reg-names
233  - vdda-supply
234
235additionalProperties: false
236
237examples:
238  - |
239    #include <dt-bindings/interrupt-controller/arm-gic.h>
240    #include <dt-bindings/clock/qcom,gcc-sdm660.h>
241    #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
242
243    camss: camss@ca00000 {
244      compatible = "qcom,sdm660-camss";
245
246      clocks = <&mmcc CAMSS_AHB_CLK>,
247        <&mmcc CAMSS_CPHY_CSID0_CLK>,
248        <&mmcc CAMSS_CPHY_CSID1_CLK>,
249        <&mmcc CAMSS_CPHY_CSID2_CLK>,
250        <&mmcc CAMSS_CPHY_CSID3_CLK>,
251        <&mmcc CAMSS_CSI0_AHB_CLK>,
252        <&mmcc CAMSS_CSI0_CLK>,
253        <&mmcc CAMSS_CPHY_CSID0_CLK>,
254        <&mmcc CAMSS_CSI0PIX_CLK>,
255        <&mmcc CAMSS_CSI0RDI_CLK>,
256        <&mmcc CAMSS_CSI1_AHB_CLK>,
257        <&mmcc CAMSS_CSI1_CLK>,
258        <&mmcc CAMSS_CPHY_CSID1_CLK>,
259        <&mmcc CAMSS_CSI1PIX_CLK>,
260        <&mmcc CAMSS_CSI1RDI_CLK>,
261        <&mmcc CAMSS_CSI2_AHB_CLK>,
262        <&mmcc CAMSS_CSI2_CLK>,
263        <&mmcc CAMSS_CPHY_CSID2_CLK>,
264        <&mmcc CAMSS_CSI2PIX_CLK>,
265        <&mmcc CAMSS_CSI2RDI_CLK>,
266        <&mmcc CAMSS_CSI3_AHB_CLK>,
267        <&mmcc CAMSS_CSI3_CLK>,
268        <&mmcc CAMSS_CPHY_CSID3_CLK>,
269        <&mmcc CAMSS_CSI3PIX_CLK>,
270        <&mmcc CAMSS_CSI3RDI_CLK>,
271        <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
272        <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
273        <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
274        <&mmcc CSIPHY_AHB2CRIF_CLK>,
275        <&mmcc CAMSS_CSI_VFE0_CLK>,
276        <&mmcc CAMSS_CSI_VFE1_CLK>,
277        <&mmcc CAMSS_ISPIF_AHB_CLK>,
278        <&mmcc THROTTLE_CAMSS_AXI_CLK>,
279        <&mmcc CAMSS_TOP_AHB_CLK>,
280        <&mmcc CAMSS_VFE0_AHB_CLK>,
281        <&mmcc CAMSS_VFE0_CLK>,
282        <&mmcc CAMSS_VFE0_STREAM_CLK>,
283        <&mmcc CAMSS_VFE1_AHB_CLK>,
284        <&mmcc CAMSS_VFE1_CLK>,
285        <&mmcc CAMSS_VFE1_STREAM_CLK>,
286        <&mmcc CAMSS_VFE_VBIF_AHB_CLK>,
287        <&mmcc CAMSS_VFE_VBIF_AXI_CLK>;
288
289      clock-names = "ahb",
290        "cphy_csid0",
291        "cphy_csid1",
292        "cphy_csid2",
293        "cphy_csid3",
294        "csi0_ahb",
295        "csi0",
296        "csi0_phy",
297        "csi0_pix",
298        "csi0_rdi",
299        "csi1_ahb",
300        "csi1",
301        "csi1_phy",
302        "csi1_pix",
303        "csi1_rdi",
304        "csi2_ahb",
305        "csi2",
306        "csi2_phy",
307        "csi2_pix",
308        "csi2_rdi",
309        "csi3_ahb",
310        "csi3",
311        "csi3_phy",
312        "csi3_pix",
313        "csi3_rdi",
314        "csiphy0_timer",
315        "csiphy1_timer",
316        "csiphy2_timer",
317        "csiphy_ahb2crif",
318        "csi_vfe0",
319        "csi_vfe1",
320        "ispif_ahb",
321        "throttle_axi",
322        "top_ahb",
323        "vfe0_ahb",
324        "vfe0",
325        "vfe0_stream",
326        "vfe1_ahb",
327        "vfe1",
328        "vfe1_stream",
329        "vfe_ahb",
330        "vfe_axi";
331
332      interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
333        <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
334        <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
335        <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
336        <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
337        <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
338        <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
339        <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
340        <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
341        <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
342
343      interrupt-names = "csid0",
344        "csid1",
345        "csid2",
346        "csid3",
347        "csiphy0",
348        "csiphy1",
349        "csiphy2",
350        "ispif",
351        "vfe0",
352        "vfe1";
353
354      iommus = <&mmss_smmu 0xc00>,
355        <&mmss_smmu 0xc01>,
356        <&mmss_smmu 0xc02>,
357        <&mmss_smmu 0xc03>;
358
359      power-domains = <&mmcc CAMSS_VFE0_GDSC>,
360        <&mmcc CAMSS_VFE1_GDSC>;
361
362      reg = <0x0ca00020 0x10>,
363        <0x0ca30000 0x100>,
364        <0x0ca30400 0x100>,
365        <0x0ca30800 0x100>,
366        <0x0ca30c00 0x100>,
367        <0x0c824000 0x1000>,
368        <0x0ca00120 0x4>,
369        <0x0c825000 0x1000>,
370        <0x0ca00124 0x4>,
371        <0x0c826000 0x1000>,
372        <0x0ca00128 0x4>,
373        <0x0ca31000 0x500>,
374        <0x0ca10000 0x1000>,
375        <0x0ca14000 0x1000>;
376
377      reg-names = "csi_clk_mux",
378        "csid0",
379        "csid1",
380        "csid2",
381        "csid3",
382        "csiphy0",
383        "csiphy0_clk_mux",
384        "csiphy1",
385        "csiphy1_clk_mux",
386        "csiphy2",
387        "csiphy2_clk_mux",
388        "ispif",
389        "vfe0",
390        "vfe1";
391
392      vdda-supply = <&reg_2v8>;
393
394      ports {
395        #address-cells = <1>;
396        #size-cells = <0>;
397      };
398    };
399