1*c66ec88fSEmmanuel VadotRenesas R-Car Gen3 Digital Radio Interface controller (DRIF) 2*c66ec88fSEmmanuel Vadot------------------------------------------------------------ 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel VadotR-Car Gen3 DRIF is a SPI like receive only slave device. A general 5*c66ec88fSEmmanuel Vadotrepresentation of DRIF interfacing with a master device is shown below. 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadot+---------------------+ +---------------------+ 8*c66ec88fSEmmanuel Vadot| |-----SCK------->|CLK | 9*c66ec88fSEmmanuel Vadot| Master |-----SS-------->|SYNC DRIFn (slave) | 10*c66ec88fSEmmanuel Vadot| |-----SD0------->|D0 | 11*c66ec88fSEmmanuel Vadot| |-----SD1------->|D1 | 12*c66ec88fSEmmanuel Vadot+---------------------+ +---------------------+ 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel VadotAs per datasheet, each DRIF channel (drifn) is made up of two internal 15*c66ec88fSEmmanuel Vadotchannels (drifn0 & drifn1). These two internal channels share the common 16*c66ec88fSEmmanuel VadotCLK & SYNC. Each internal channel has its own dedicated resources like 17*c66ec88fSEmmanuel Vadotirq, dma channels, address space & clock. This internal split is not 18*c66ec88fSEmmanuel Vadotvisible to the external master device. 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel VadotThe device tree model represents each internal channel as a separate node. 21*c66ec88fSEmmanuel VadotThe internal channels sharing the CLK & SYNC are tied together by their 22*c66ec88fSEmmanuel Vadotphandles using a property called "renesas,bonding". For the rest of 23*c66ec88fSEmmanuel Vadotthe documentation, unless explicitly stated, the word channel implies an 24*c66ec88fSEmmanuel Vadotinternal channel. 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel VadotWhen both internal channels are enabled they need to be managed together 27*c66ec88fSEmmanuel Vadotas one (i.e.) they cannot operate alone as independent devices. Out of the 28*c66ec88fSEmmanuel Vadottwo, one of them needs to act as a primary device that accepts common 29*c66ec88fSEmmanuel Vadotproperties of both the internal channels. This channel is identified by a 30*c66ec88fSEmmanuel Vadotproperty called "renesas,primary-bond". 31*c66ec88fSEmmanuel Vadot 32*c66ec88fSEmmanuel VadotTo summarize, 33*c66ec88fSEmmanuel Vadot - When both the internal channels that are bonded together are enabled, 34*c66ec88fSEmmanuel Vadot the zeroth channel is selected as primary-bond. This channels accepts 35*c66ec88fSEmmanuel Vadot properties common to all the members of the bond. 36*c66ec88fSEmmanuel Vadot - When only one of the bonded channels need to be enabled, the property 37*c66ec88fSEmmanuel Vadot "renesas,bonding" or "renesas,primary-bond" will have no effect. That 38*c66ec88fSEmmanuel Vadot enabled channel can act alone as any other independent device. 39*c66ec88fSEmmanuel Vadot 40*c66ec88fSEmmanuel VadotRequired properties of an internal channel: 41*c66ec88fSEmmanuel Vadot------------------------------------------- 42*c66ec88fSEmmanuel Vadot- compatible: "renesas,r8a7795-drif" if DRIF controller is a part of R8A7795 SoC. 43*c66ec88fSEmmanuel Vadot "renesas,r8a7796-drif" if DRIF controller is a part of R8A7796 SoC. 44*c66ec88fSEmmanuel Vadot "renesas,rcar-gen3-drif" for a generic R-Car Gen3 compatible device. 45*c66ec88fSEmmanuel Vadot 46*c66ec88fSEmmanuel Vadot When compatible with the generic version, nodes must list the 47*c66ec88fSEmmanuel Vadot SoC-specific version corresponding to the platform first 48*c66ec88fSEmmanuel Vadot followed by the generic version. 49*c66ec88fSEmmanuel Vadot 50*c66ec88fSEmmanuel Vadot- reg: offset and length of that channel. 51*c66ec88fSEmmanuel Vadot- interrupts: associated with that channel. 52*c66ec88fSEmmanuel Vadot- clocks: phandle and clock specifier of that channel. 53*c66ec88fSEmmanuel Vadot- clock-names: clock input name string: "fck". 54*c66ec88fSEmmanuel Vadot- dmas: phandles to the DMA channels. 55*c66ec88fSEmmanuel Vadot- dma-names: names of the DMA channel: "rx". 56*c66ec88fSEmmanuel Vadot- renesas,bonding: phandle to the other channel. 57*c66ec88fSEmmanuel Vadot 58*c66ec88fSEmmanuel VadotOptional properties of an internal channel: 59*c66ec88fSEmmanuel Vadot------------------------------------------- 60*c66ec88fSEmmanuel Vadot- power-domains: phandle to the respective power domain. 61*c66ec88fSEmmanuel Vadot 62*c66ec88fSEmmanuel VadotRequired properties of an internal channel when: 63*c66ec88fSEmmanuel Vadot - It is the only enabled channel of the bond (or) 64*c66ec88fSEmmanuel Vadot - If it acts as primary among enabled bonds 65*c66ec88fSEmmanuel Vadot-------------------------------------------------------- 66*c66ec88fSEmmanuel Vadot- pinctrl-0: pin control group to be used for this channel. 67*c66ec88fSEmmanuel Vadot- pinctrl-names: must be "default". 68*c66ec88fSEmmanuel Vadot- renesas,primary-bond: empty property indicating the channel acts as primary 69*c66ec88fSEmmanuel Vadot among the bonded channels. 70*c66ec88fSEmmanuel Vadot- port: child port node corresponding to the data input, in accordance with 71*c66ec88fSEmmanuel Vadot the video interface bindings defined in 72*c66ec88fSEmmanuel Vadot Documentation/devicetree/bindings/media/video-interfaces.txt. The port 73*c66ec88fSEmmanuel Vadot node must contain at least one endpoint. 74*c66ec88fSEmmanuel Vadot 75*c66ec88fSEmmanuel VadotOptional endpoint property: 76*c66ec88fSEmmanuel Vadot--------------------------- 77*c66ec88fSEmmanuel Vadot- sync-active: Indicates sync signal polarity, 0/1 for low/high respectively. 78*c66ec88fSEmmanuel Vadot This property maps to SYNCAC bit in the hardware manual. The 79*c66ec88fSEmmanuel Vadot default is 1 (active high). 80*c66ec88fSEmmanuel Vadot 81*c66ec88fSEmmanuel VadotExample: 82*c66ec88fSEmmanuel Vadot-------- 83*c66ec88fSEmmanuel Vadot 84*c66ec88fSEmmanuel Vadot(1) Both internal channels enabled: 85*c66ec88fSEmmanuel Vadot----------------------------------- 86*c66ec88fSEmmanuel Vadot 87*c66ec88fSEmmanuel VadotWhen interfacing with a third party tuner device with two data pins as shown 88*c66ec88fSEmmanuel Vadotbelow. 89*c66ec88fSEmmanuel Vadot 90*c66ec88fSEmmanuel Vadot+---------------------+ +---------------------+ 91*c66ec88fSEmmanuel Vadot| |-----SCK------->|CLK | 92*c66ec88fSEmmanuel Vadot| Master |-----SS-------->|SYNC DRIFn (slave) | 93*c66ec88fSEmmanuel Vadot| |-----SD0------->|D0 | 94*c66ec88fSEmmanuel Vadot| |-----SD1------->|D1 | 95*c66ec88fSEmmanuel Vadot+---------------------+ +---------------------+ 96*c66ec88fSEmmanuel Vadot 97*c66ec88fSEmmanuel Vadot drif00: rif@e6f40000 { 98*c66ec88fSEmmanuel Vadot compatible = "renesas,r8a7795-drif", 99*c66ec88fSEmmanuel Vadot "renesas,rcar-gen3-drif"; 100*c66ec88fSEmmanuel Vadot reg = <0 0xe6f40000 0 0x64>; 101*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 102*c66ec88fSEmmanuel Vadot clocks = <&cpg CPG_MOD 515>; 103*c66ec88fSEmmanuel Vadot clock-names = "fck"; 104*c66ec88fSEmmanuel Vadot dmas = <&dmac1 0x20>, <&dmac2 0x20>; 105*c66ec88fSEmmanuel Vadot dma-names = "rx", "rx"; 106*c66ec88fSEmmanuel Vadot power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 107*c66ec88fSEmmanuel Vadot renesas,bonding = <&drif01>; 108*c66ec88fSEmmanuel Vadot renesas,primary-bond; 109*c66ec88fSEmmanuel Vadot pinctrl-0 = <&drif0_pins>; 110*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 111*c66ec88fSEmmanuel Vadot port { 112*c66ec88fSEmmanuel Vadot drif0_ep: endpoint { 113*c66ec88fSEmmanuel Vadot remote-endpoint = <&tuner_ep>; 114*c66ec88fSEmmanuel Vadot }; 115*c66ec88fSEmmanuel Vadot }; 116*c66ec88fSEmmanuel Vadot }; 117*c66ec88fSEmmanuel Vadot 118*c66ec88fSEmmanuel Vadot drif01: rif@e6f50000 { 119*c66ec88fSEmmanuel Vadot compatible = "renesas,r8a7795-drif", 120*c66ec88fSEmmanuel Vadot "renesas,rcar-gen3-drif"; 121*c66ec88fSEmmanuel Vadot reg = <0 0xe6f50000 0 0x64>; 122*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 123*c66ec88fSEmmanuel Vadot clocks = <&cpg CPG_MOD 514>; 124*c66ec88fSEmmanuel Vadot clock-names = "fck"; 125*c66ec88fSEmmanuel Vadot dmas = <&dmac1 0x22>, <&dmac2 0x22>; 126*c66ec88fSEmmanuel Vadot dma-names = "rx", "rx"; 127*c66ec88fSEmmanuel Vadot power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 128*c66ec88fSEmmanuel Vadot renesas,bonding = <&drif00>; 129*c66ec88fSEmmanuel Vadot }; 130*c66ec88fSEmmanuel Vadot 131*c66ec88fSEmmanuel Vadot 132*c66ec88fSEmmanuel Vadot(2) Internal channel 1 alone is enabled: 133*c66ec88fSEmmanuel Vadot---------------------------------------- 134*c66ec88fSEmmanuel Vadot 135*c66ec88fSEmmanuel VadotWhen interfacing with a third party tuner device with one data pin as shown 136*c66ec88fSEmmanuel Vadotbelow. 137*c66ec88fSEmmanuel Vadot 138*c66ec88fSEmmanuel Vadot+---------------------+ +---------------------+ 139*c66ec88fSEmmanuel Vadot| |-----SCK------->|CLK | 140*c66ec88fSEmmanuel Vadot| Master |-----SS-------->|SYNC DRIFn (slave) | 141*c66ec88fSEmmanuel Vadot| | |D0 (unused) | 142*c66ec88fSEmmanuel Vadot| |-----SD-------->|D1 | 143*c66ec88fSEmmanuel Vadot+---------------------+ +---------------------+ 144*c66ec88fSEmmanuel Vadot 145*c66ec88fSEmmanuel Vadot drif00: rif@e6f40000 { 146*c66ec88fSEmmanuel Vadot compatible = "renesas,r8a7795-drif", 147*c66ec88fSEmmanuel Vadot "renesas,rcar-gen3-drif"; 148*c66ec88fSEmmanuel Vadot reg = <0 0xe6f40000 0 0x64>; 149*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 150*c66ec88fSEmmanuel Vadot clocks = <&cpg CPG_MOD 515>; 151*c66ec88fSEmmanuel Vadot clock-names = "fck"; 152*c66ec88fSEmmanuel Vadot dmas = <&dmac1 0x20>, <&dmac2 0x20>; 153*c66ec88fSEmmanuel Vadot dma-names = "rx", "rx"; 154*c66ec88fSEmmanuel Vadot power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 155*c66ec88fSEmmanuel Vadot renesas,bonding = <&drif01>; 156*c66ec88fSEmmanuel Vadot }; 157*c66ec88fSEmmanuel Vadot 158*c66ec88fSEmmanuel Vadot drif01: rif@e6f50000 { 159*c66ec88fSEmmanuel Vadot compatible = "renesas,r8a7795-drif", 160*c66ec88fSEmmanuel Vadot "renesas,rcar-gen3-drif"; 161*c66ec88fSEmmanuel Vadot reg = <0 0xe6f50000 0 0x64>; 162*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 163*c66ec88fSEmmanuel Vadot clocks = <&cpg CPG_MOD 514>; 164*c66ec88fSEmmanuel Vadot clock-names = "fck"; 165*c66ec88fSEmmanuel Vadot dmas = <&dmac1 0x22>, <&dmac2 0x22>; 166*c66ec88fSEmmanuel Vadot dma-names = "rx", "rx"; 167*c66ec88fSEmmanuel Vadot power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 168*c66ec88fSEmmanuel Vadot renesas,bonding = <&drif00>; 169*c66ec88fSEmmanuel Vadot pinctrl-0 = <&drif0_pins>; 170*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 171*c66ec88fSEmmanuel Vadot port { 172*c66ec88fSEmmanuel Vadot drif0_ep: endpoint { 173*c66ec88fSEmmanuel Vadot remote-endpoint = <&tuner_ep>; 174*c66ec88fSEmmanuel Vadot sync-active = <0>; 175*c66ec88fSEmmanuel Vadot }; 176*c66ec88fSEmmanuel Vadot }; 177*c66ec88fSEmmanuel Vadot }; 178