1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright (C) 2022 Renesas Electronics Corp.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/media/renesas,rzg2l-csi2.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Renesas RZ/G2L (and alike SoC's) MIPI CSI-2 receiver
9
10maintainers:
11  - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
12
13description:
14  The CSI-2 receiver device provides MIPI CSI-2 capabilities for the Renesas RZ/G2L
15  (and alike SoCs). MIPI CSI-2 is part of the CRU block which is used in conjunction
16  with the Image Processing module, which provides the video capture capabilities.
17
18properties:
19  compatible:
20    items:
21      - enum:
22          - renesas,r9a07g044-csi2       # RZ/G2{L,LC}
23          - renesas,r9a07g054-csi2       # RZ/V2L
24      - const: renesas,rzg2l-csi2
25
26  reg:
27    maxItems: 1
28
29  interrupts:
30    maxItems: 1
31
32  clocks:
33    items:
34      - description: Internal clock for connecting CRU and MIPI
35      - description: CRU Main clock
36      - description: CRU Register access clock
37
38  clock-names:
39    items:
40      - const: system
41      - const: video
42      - const: apb
43
44  power-domains:
45    maxItems: 1
46
47  resets:
48    items:
49      - description: CRU_PRESETN reset terminal
50      - description: CRU_CMN_RSTB reset terminal
51
52  reset-names:
53    items:
54      - const: presetn
55      - const: cmn-rstb
56
57  ports:
58    $ref: /schemas/graph.yaml#/properties/ports
59
60    properties:
61      port@0:
62        $ref: /schemas/graph.yaml#/$defs/port-base
63        unevaluatedProperties: false
64        description:
65          Input port node, single endpoint describing the CSI-2 transmitter.
66
67        properties:
68          endpoint:
69            $ref: video-interfaces.yaml#
70            unevaluatedProperties: false
71
72            properties:
73              data-lanes:
74                minItems: 1
75                maxItems: 4
76                items:
77                  maximum: 4
78
79            required:
80              - clock-lanes
81              - data-lanes
82
83      port@1:
84        $ref: /schemas/graph.yaml#/properties/port
85        description:
86          Output port node, Image Processing block connected to the CSI-2 receiver.
87
88    required:
89      - port@0
90      - port@1
91
92required:
93  - compatible
94  - reg
95  - interrupts
96  - clocks
97  - clock-names
98  - power-domains
99  - resets
100  - reset-names
101  - ports
102
103additionalProperties: false
104
105examples:
106  - |
107    #include <dt-bindings/clock/r9a07g044-cpg.h>
108    #include <dt-bindings/interrupt-controller/arm-gic.h>
109
110    csi: csi@10830400 {
111        compatible = "renesas,r9a07g044-csi2", "renesas,rzg2l-csi2";
112        reg = <0x10830400 0xfc00>;
113        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
114        clocks = <&cpg CPG_MOD R9A07G044_CRU_SYSCLK>,
115                 <&cpg CPG_MOD R9A07G044_CRU_VCLK>,
116                 <&cpg CPG_MOD R9A07G044_CRU_PCLK>;
117        clock-names = "system", "video", "apb";
118        power-domains = <&cpg>;
119        resets = <&cpg R9A07G044_CRU_PRESETN>,
120                 <&cpg R9A07G044_CRU_CMN_RSTB>;
121        reset-names = "presetn", "cmn-rstb";
122
123        ports {
124            #address-cells = <1>;
125            #size-cells = <0>;
126
127            port@0 {
128                reg = <0>;
129
130                csi2_in: endpoint {
131                    clock-lanes = <0>;
132                    data-lanes = <1 2>;
133                    remote-endpoint = <&ov5645_ep>;
134                };
135            };
136
137            port@1 {
138                #address-cells = <1>;
139                #size-cells = <0>;
140
141                reg = <1>;
142
143                csi2cru: endpoint@0 {
144                    reg = <0>;
145                    remote-endpoint = <&crucsi2>;
146                };
147            };
148        };
149    };
150