1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/ti,cal.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL) Device Tree Bindings
8
9maintainers:
10  - Benoit Parrot <bparrot@ti.com>
11
12description: |-
13  The Camera Adaptation Layer (CAL) is a key component for image capture
14  applications. The capture module provides the system interface and the
15  processing capability to connect CSI2 image-sensor modules to the
16  DRA72x device.
17
18  CAL supports 2 camera port nodes on MIPI bus.
19
20properties:
21  compatible:
22    enum:
23      # for DRA72 controllers
24      - ti,dra72-cal
25      # for DRA72 controllers pre ES2.0
26      - ti,dra72-pre-es2-cal
27      # for DRA76 controllers
28      - ti,dra76-cal
29      # for AM654 controllers
30      - ti,am654-cal
31
32  reg:
33    minItems: 2
34    items:
35      - description: The CAL main register region
36      - description: The RX Core0 (DPHY0) register region
37      - description: The RX Core1 (DPHY1) register region
38
39  reg-names:
40    minItems: 2
41    items:
42      - const: cal_top
43      - const: cal_rx_core0
44      - const: cal_rx_core1
45
46  interrupts:
47    maxItems: 1
48
49  ti,camerrx-control:
50    $ref: "/schemas/types.yaml#/definitions/phandle-array"
51    description:
52      phandle to the device control module and offset to the
53      control_camerarx_core register
54
55  clocks:
56    maxItems: 1
57
58  clock-names:
59    const: fck
60
61  power-domains:
62    description:
63      List of phandle and PM domain specifier as documented in
64      Documentation/devicetree/bindings/power/power_domain.txt
65    maxItems: 1
66
67  ports:
68    $ref: /schemas/graph.yaml#/properties/ports
69
70    properties:
71      port@0:
72        $ref: /schemas/graph.yaml#/$defs/port-base
73        unevaluatedProperties: false
74        description: CSI2 Port #0
75
76        properties:
77          endpoint:
78            $ref: video-interfaces.yaml#
79            unevaluatedProperties: false
80
81            properties:
82              clock-lanes:
83                maxItems: 1
84
85              data-lanes:
86                minItems: 1
87                maxItems: 4
88
89      port@1:
90        $ref: /schemas/graph.yaml#/$defs/port-base
91        unevaluatedProperties: false
92        description: CSI2 Port #1
93
94        properties:
95          endpoint:
96            $ref: video-interfaces.yaml#
97            unevaluatedProperties: false
98
99            properties:
100              clock-lanes:
101                maxItems: 1
102
103              data-lanes:
104                minItems: 1
105                maxItems: 4
106
107    required:
108      - port@0
109
110required:
111  - compatible
112  - reg
113  - reg-names
114  - interrupts
115  - ti,camerrx-control
116
117additionalProperties: false
118
119examples:
120  - |
121    #include <dt-bindings/interrupt-controller/arm-gic.h>
122
123    cal: cal@4845b000 {
124        compatible = "ti,dra72-cal";
125        reg = <0x4845B000 0x400>,
126              <0x4845B800 0x40>,
127              <0x4845B900 0x40>;
128        reg-names = "cal_top",
129                    "cal_rx_core0",
130                    "cal_rx_core1";
131        interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
132        ti,camerrx-control = <&scm_conf 0xE94>;
133
134        ports {
135              #address-cells = <1>;
136              #size-cells = <0>;
137
138              csi2_0: port@0 {
139                    reg = <0>;
140                    csi2_phy0: endpoint {
141                           remote-endpoint = <&csi2_cam0>;
142                           clock-lanes = <0>;
143                           data-lanes = <1 2>;
144                    };
145              };
146        };
147    };
148
149    i2c {
150        clock-frequency = <400000>;
151        #address-cells = <1>;
152        #size-cells = <0>;
153
154        camera-sensor@3c {
155               compatible = "ovti,ov5640";
156               reg = <0x3c>;
157
158               clocks = <&clk_ov5640_fixed>;
159               clock-names = "xclk";
160
161               port {
162                    csi2_cam0: endpoint {
163                            remote-endpoint = <&csi2_phy0>;
164                            clock-lanes = <0>;
165                            data-lanes = <1 2>;
166                    };
167               };
168        };
169    };
170
171...
172