1* LPDDR3 SDRAM memories compliant to JEDEC JESD209-3C
2
3Required properties:
4- compatible : Should be "<vendor>,<type>", and generic value "jedec,lpddr3".
5  Example "<vendor>,<type>" values:
6    "samsung,K3QF2F20DB"
7
8- density  : <u32> representing density in Mb (Mega bits)
9- io-width : <u32> representing bus width. Possible values are 8, 16, 32, 64
10- #address-cells: Must be set to 1
11- #size-cells: Must be set to 0
12
13Optional properties:
14
15- manufacturer-id : <u32>     Manufacturer ID value read from Mode Register 5
16- revision-id     : <u32 u32> Revision IDs read from Mode Registers 6 and 7
17
18The following optional properties represent the minimum value of some AC
19timing parameters of the DDR device in terms of number of clock cycles.
20These values shall be obtained from the device data-sheet.
21- tRFC-min-tck
22- tRRD-min-tck
23- tRPab-min-tck
24- tRPpb-min-tck
25- tRCD-min-tck
26- tRC-min-tck
27- tRAS-min-tck
28- tWTR-min-tck
29- tWR-min-tck
30- tRTP-min-tck
31- tW2W-C2C-min-tck
32- tR2R-C2C-min-tck
33- tWL-min-tck
34- tDQSCK-min-tck
35- tRL-min-tck
36- tFAW-min-tck
37- tXSR-min-tck
38- tXP-min-tck
39- tCKE-min-tck
40- tCKESR-min-tck
41- tMRD-min-tck
42
43Child nodes:
44- The lpddr3 node may have one or more child nodes of type "lpddr3-timings".
45  "lpddr3-timings" provides AC timing parameters of the device for
46  a given speed-bin. Please see
47  Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3-timings.txt
48  for more information on "lpddr3-timings"
49
50Example:
51
52samsung_K3QF2F20DB: lpddr3 {
53	compatible	= "samsung,K3QF2F20DB", "jedec,lpddr3";
54	density		= <16384>;
55	io-width	= <32>;
56	manufacturer-id = <1>;
57	revision-id     = <123 234>;
58	#address-cells	= <1>;
59	#size-cells	= <0>;
60
61	tRFC-min-tck		= <17>;
62	tRRD-min-tck		= <2>;
63	tRPab-min-tck		= <2>;
64	tRPpb-min-tck		= <2>;
65	tRCD-min-tck		= <3>;
66	tRC-min-tck		= <6>;
67	tRAS-min-tck		= <5>;
68	tWTR-min-tck		= <2>;
69	tWR-min-tck		= <7>;
70	tRTP-min-tck		= <2>;
71	tW2W-C2C-min-tck	= <0>;
72	tR2R-C2C-min-tck	= <0>;
73	tWL-min-tck		= <8>;
74	tDQSCK-min-tck		= <5>;
75	tRL-min-tck		= <14>;
76	tFAW-min-tck		= <5>;
77	tXSR-min-tck		= <12>;
78	tXP-min-tck		= <2>;
79	tCKE-min-tck		= <2>;
80	tCKESR-min-tck		= <2>;
81	tMRD-min-tck		= <5>;
82
83	timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 {
84		compatible	= "jedec,lpddr3-timings";
85		/* workaround: 'reg' shows max-freq */
86		reg		= <800000000>;
87		min-freq	= <100000000>;
88		tRFC		= <65000>;
89		tRRD		= <6000>;
90		tRPab		= <12000>;
91		tRPpb		= <12000>;
92		tRCD		= <10000>;
93		tRC		= <33750>;
94		tRAS		= <23000>;
95		tWTR		= <3750>;
96		tWR		= <7500>;
97		tRTP		= <3750>;
98		tW2W-C2C	= <0>;
99		tR2R-C2C	= <0>;
100		tFAW		= <25000>;
101		tXSR		= <70000>;
102		tXP		= <3750>;
103		tCKE		= <3750>;
104		tCKESR		= <3750>;
105		tMRD		= <7000>;
106	};
107}
108