1*f126890aSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*f126890aSEmmanuel Vadot%YAML 1.2 3*f126890aSEmmanuel Vadot--- 4*f126890aSEmmanuel Vadot$id: http://devicetree.org/schemas/memory-controllers/nuvoton,npcm-memory-controller.yaml# 5*f126890aSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*f126890aSEmmanuel Vadot 7*f126890aSEmmanuel Vadottitle: Nuvoton NPCM Memory Controller 8*f126890aSEmmanuel Vadot 9*f126890aSEmmanuel Vadotmaintainers: 10*f126890aSEmmanuel Vadot - Marvin Lin <kflin@nuvoton.com> 11*f126890aSEmmanuel Vadot - Stanley Chu <yschu@nuvoton.com> 12*f126890aSEmmanuel Vadot 13*f126890aSEmmanuel Vadotdescription: | 14*f126890aSEmmanuel Vadot The Nuvoton BMC SoC supports DDR4 memory with or without ECC (error correction 15*f126890aSEmmanuel Vadot check). 16*f126890aSEmmanuel Vadot 17*f126890aSEmmanuel Vadot The memory controller supports single bit error correction, double bit error 18*f126890aSEmmanuel Vadot detection (in-line ECC in which a section (1/8th) of the memory device used to 19*f126890aSEmmanuel Vadot store data is used for ECC storage). 20*f126890aSEmmanuel Vadot 21*f126890aSEmmanuel Vadot Note, the bootloader must configure ECC mode for the memory controller. 22*f126890aSEmmanuel Vadot 23*f126890aSEmmanuel Vadotproperties: 24*f126890aSEmmanuel Vadot compatible: 25*f126890aSEmmanuel Vadot enum: 26*f126890aSEmmanuel Vadot - nuvoton,npcm750-memory-controller 27*f126890aSEmmanuel Vadot - nuvoton,npcm845-memory-controller 28*f126890aSEmmanuel Vadot 29*f126890aSEmmanuel Vadot reg: 30*f126890aSEmmanuel Vadot maxItems: 1 31*f126890aSEmmanuel Vadot 32*f126890aSEmmanuel Vadot interrupts: 33*f126890aSEmmanuel Vadot maxItems: 1 34*f126890aSEmmanuel Vadot 35*f126890aSEmmanuel Vadotrequired: 36*f126890aSEmmanuel Vadot - compatible 37*f126890aSEmmanuel Vadot - reg 38*f126890aSEmmanuel Vadot - interrupts 39*f126890aSEmmanuel Vadot 40*f126890aSEmmanuel VadotadditionalProperties: false 41*f126890aSEmmanuel Vadot 42*f126890aSEmmanuel Vadotexamples: 43*f126890aSEmmanuel Vadot - | 44*f126890aSEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 45*f126890aSEmmanuel Vadot 46*f126890aSEmmanuel Vadot mc: memory-controller@f0824000 { 47*f126890aSEmmanuel Vadot compatible = "nuvoton,npcm750-memory-controller"; 48*f126890aSEmmanuel Vadot reg = <0xf0824000 0x1000>; 49*f126890aSEmmanuel Vadot interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 50*f126890aSEmmanuel Vadot }; 51