1Device-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver
2
3Required properties:
4 - compatible: value should be one of the following:
5   "atmel,at91sam9n12-hlcdc"
6   "atmel,at91sam9x5-hlcdc"
7   "atmel,sama5d2-hlcdc"
8   "atmel,sama5d3-hlcdc"
9   "atmel,sama5d4-hlcdc"
10   "microchip,sam9x60-hlcdc"
11 - reg: base address and size of the HLCDC device registers.
12 - clock-names: the name of the 3 clocks requested by the HLCDC device.
13   Should contain "periph_clk", "sys_clk" and "slow_clk".
14 - clocks: should contain the 3 clocks requested by the HLCDC device.
15 - interrupts: should contain the description of the HLCDC interrupt line
16
17The HLCDC IP exposes two subdevices:
18 - a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt
19 - a Display Controller: see ../display/atmel/hlcdc-dc.txt
20
21Example:
22
23	hlcdc: hlcdc@f0030000 {
24		compatible = "atmel,sama5d3-hlcdc";
25		reg = <0xf0030000 0x2000>;
26		clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
27		clock-names = "periph_clk","sys_clk", "slow_clk";
28		interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
29
30		hlcdc-display-controller {
31			compatible = "atmel,hlcdc-display-controller";
32			pinctrl-names = "default";
33			pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
34			#address-cells = <1>;
35			#size-cells = <0>;
36
37			port@0 {
38				#address-cells = <1>;
39				#size-cells = <0>;
40				reg = <0>;
41
42				hlcdc_panel_output: endpoint@0 {
43					reg = <0>;
44					remote-endpoint = <&panel_input>;
45				};
46			};
47		};
48
49		hlcdc_pwm: hlcdc-pwm {
50			compatible = "atmel,hlcdc-pwm";
51			pinctrl-names = "default";
52			pinctrl-0 = <&pinctrl_lcd_pwm>;
53			#pwm-cells = <3>;
54		};
55	};
56