1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
8
9maintainers:
10  - Shawn Guo <shawnguo@kernel.org>
11
12allOf:
13  - $ref: sdhci-common.yaml#
14
15description: |
16  The Enhanced Secure Digital Host Controller on Freescale i.MX family
17  provides an interface for MMC, SD, and SDIO types of memory cards.
18
19  This file documents differences between the core properties described
20  by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
21
22properties:
23  compatible:
24    oneOf:
25      - enum:
26          - fsl,imx25-esdhc
27          - fsl,imx35-esdhc
28          - fsl,imx51-esdhc
29          - fsl,imx53-esdhc
30          - fsl,imx6q-usdhc
31          - fsl,imx6sl-usdhc
32          - fsl,imx6sx-usdhc
33          - fsl,imx7d-usdhc
34          - fsl,imx7ulp-usdhc
35          - fsl,imx8mm-usdhc
36          - fsl,imxrt1050-usdhc
37          - nxp,s32g2-usdhc
38      - items:
39          - const: fsl,imx50-esdhc
40          - const: fsl,imx53-esdhc
41      - items:
42          - enum:
43              - fsl,imx6sll-usdhc
44              - fsl,imx6ull-usdhc
45              - fsl,imx6ul-usdhc
46          - const: fsl,imx6sx-usdhc
47      - items:
48          - const: fsl,imx7d-usdhc
49          - const: fsl,imx6sl-usdhc
50      - items:
51          - enum:
52              - fsl,imx8mq-usdhc
53          - const: fsl,imx7d-usdhc
54      - items:
55          - enum:
56              - fsl,imx8mn-usdhc
57              - fsl,imx8mp-usdhc
58              - fsl,imx93-usdhc
59              - fsl,imx8ulp-usdhc
60          - const: fsl,imx8mm-usdhc
61      - items:
62          - enum:
63              - fsl,imx8dxl-usdhc
64              - fsl,imx8qm-usdhc
65          - const: fsl,imx8qxp-usdhc
66      - items:
67          - enum:
68              - fsl,imx8mm-usdhc
69              - fsl,imx8mn-usdhc
70              - fsl,imx8mp-usdhc
71              - fsl,imx8qm-usdhc
72              - fsl,imx8qxp-usdhc
73          - const: fsl,imx7d-usdhc
74        deprecated: true
75      - items:
76          - enum:
77              - fsl,imx8mn-usdhc
78              - fsl,imx8mp-usdhc
79          - const: fsl,imx8mm-usdhc
80          - const: fsl,imx7d-usdhc
81        deprecated: true
82      - items:
83          - enum:
84              - fsl,imx8dxl-usdhc
85              - fsl,imx8qm-usdhc
86          - const: fsl,imx8qxp-usdhc
87          - const: fsl,imx7d-usdhc
88        deprecated: true
89      - items:
90          - enum:
91              - fsl,imxrt1170-usdhc
92          - const: fsl,imxrt1050-usdhc
93
94  reg:
95    maxItems: 1
96
97  interrupts:
98    maxItems: 1
99
100  fsl,wp-controller:
101    description: |
102      boolean, if present, indicate to use controller internal write protection.
103    type: boolean
104
105  fsl,delay-line:
106    $ref: /schemas/types.yaml#/definitions/uint32
107    description: |
108      Specify the number of delay cells for override mode.
109      This is used to set the clock delay for DLL(Delay Line) on override mode
110      to select a proper data sampling window in case the clock quality is not good
111      because the signal path is too long on the board. Please refer to eSDHC/uSDHC
112      chapter, DLL (Delay Line) section in RM for details.
113    default: 0
114
115  voltage-ranges:
116    $ref: /schemas/types.yaml#/definitions/uint32-matrix
117    description: |
118      Specify the voltage range in case there are software transparent level
119      shifters on the outputs of the controller. Two cells are required, first
120      cell specifies minimum slot voltage (mV), second cell specifies maximum
121      slot voltage (mV).
122    items:
123      items:
124        - description: value for minimum slot voltage
125        - description: value for maximum slot voltage
126    maxItems: 1
127
128  fsl,tuning-start-tap:
129    $ref: /schemas/types.yaml#/definitions/uint32
130    description: |
131      Specify the start delay cell point when send first CMD19 in tuning procedure.
132    default: 0
133
134  fsl,tuning-step:
135    $ref: /schemas/types.yaml#/definitions/uint32
136    description: |
137      Specify the increasing delay cell steps in tuning procedure.
138      The uSDHC use one delay cell as default increasing step to do tuning process.
139      This property allows user to change the tuning step to more than one delay
140      cell which is useful for some special boards or cards when the default
141      tuning step can't find the proper delay window within limited tuning retries.
142    default: 0
143
144  fsl,strobe-dll-delay-target:
145    $ref: /schemas/types.yaml#/definitions/uint32
146    description: |
147      Specify the strobe dll control slave delay target.
148      This delay target programming host controller loopback read clock, and this
149      property allows user to change the delay target for the strobe input read clock.
150      If not use this property, driver default set the delay target to value 7.
151      Only eMMC HS400 mode need to take care of this property.
152    default: 0
153
154  clocks:
155    maxItems: 3
156    description:
157      Handle clocks for the sdhc controller.
158
159  clock-names:
160    items:
161      - const: ipg
162      - const: ahb
163      - const: per
164
165  power-domains:
166    maxItems: 1
167
168  pinctrl-names:
169    oneOf:
170      - minItems: 3
171        items:
172          - const: default
173          - const: state_100mhz
174          - const: state_200mhz
175          - const: sleep
176      - minItems: 1
177        items:
178          - const: default
179          - const: sleep
180
181required:
182  - compatible
183  - reg
184  - interrupts
185
186unevaluatedProperties: false
187
188examples:
189  - |
190    mmc@70004000 {
191        compatible = "fsl,imx51-esdhc";
192        reg = <0x70004000 0x4000>;
193        interrupts = <1>;
194        fsl,wp-controller;
195    };
196
197    mmc@70008000 {
198        compatible = "fsl,imx51-esdhc";
199        reg = <0x70008000 0x4000>;
200        interrupts = <2>;
201        cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
202        wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
203    };
204