1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Ethernet Controller Generic Binding
8
9maintainers:
10  - David S. Miller <davem@davemloft.net>
11
12properties:
13  $nodename:
14    pattern: "^ethernet(@.*)?$"
15
16  label:
17    $ref: /schemas/types.yaml#/definitions/string
18    description: Human readable label on a port of a box.
19
20  local-mac-address:
21    description:
22      Specifies the MAC address that was assigned to the network device.
23    $ref: /schemas/types.yaml#/definitions/uint8-array
24    minItems: 6
25    maxItems: 6
26
27  mac-address:
28    description:
29      Specifies the MAC address that was last used by the boot
30      program; should be used in cases where the MAC address assigned
31      to the device by the boot program is different from the
32      local-mac-address property.
33    $ref: /schemas/types.yaml#/definitions/uint8-array
34    minItems: 6
35    maxItems: 6
36
37  max-frame-size:
38    $ref: /schemas/types.yaml#/definitions/uint32
39    description:
40      Maximum transfer unit (IEEE defined MTU), rather than the
41      maximum frame size (there\'s contradiction in the Devicetree
42      Specification).
43
44  max-speed:
45    $ref: /schemas/types.yaml#/definitions/uint32
46    description:
47      Specifies maximum speed in Mbit/s supported by the device.
48
49  nvmem-cells:
50    maxItems: 1
51    description:
52      Reference to an nvmem node for the MAC address
53
54  nvmem-cell-names:
55    const: mac-address
56
57  phy-connection-type:
58    description:
59      Specifies interface type between the Ethernet device and a physical
60      layer (PHY) device.
61    enum:
62      # There is not a standard bus between the MAC and the PHY,
63      # something proprietary is being used to embed the PHY in the
64      # MAC.
65      - internal
66      - mii
67      - gmii
68      - sgmii
69      - qsgmii
70      - tbi
71      - rev-mii
72      - rmii
73      - rev-rmii
74      - moca
75
76      # RX and TX delays are added by the MAC when required
77      - rgmii
78
79      # RGMII with internal RX and TX delays provided by the PHY,
80      # the MAC should not add the RX or TX delays in this case
81      - rgmii-id
82
83      # RGMII with internal RX delay provided by the PHY, the MAC
84      # should not add an RX delay in this case
85      - rgmii-rxid
86
87      # RGMII with internal TX delay provided by the PHY, the MAC
88      # should not add an TX delay in this case
89      - rgmii-txid
90      - rtbi
91      - smii
92      - xgmii
93      - trgmii
94      - 1000base-x
95      - 2500base-x
96      - 5gbase-r
97      - rxaui
98      - xaui
99
100      # 10GBASE-KR, XFI, SFI
101      - 10gbase-kr
102      - usxgmii
103      - 10gbase-r
104      - 25gbase-r
105
106  phy-mode:
107    $ref: "#/properties/phy-connection-type"
108
109  pcs-handle:
110    $ref: /schemas/types.yaml#/definitions/phandle
111    description:
112      Specifies a reference to a node representing a PCS PHY device on a MDIO
113      bus to link with an external PHY (phy-handle) if exists.
114
115  phy-handle:
116    $ref: /schemas/types.yaml#/definitions/phandle
117    description:
118      Specifies a reference to a node representing a PHY device.
119
120  phy:
121    $ref: "#/properties/phy-handle"
122    deprecated: true
123
124  phy-device:
125    $ref: "#/properties/phy-handle"
126    deprecated: true
127
128  rx-fifo-depth:
129    $ref: /schemas/types.yaml#/definitions/uint32
130    description:
131      The size of the controller\'s receive fifo in bytes. This is used
132      for components that can have configurable receive fifo sizes,
133      and is useful for determining certain configuration settings
134      such as flow control thresholds.
135
136  sfp:
137    $ref: /schemas/types.yaml#/definitions/phandle
138    description:
139      Specifies a reference to a node representing a SFP cage.
140
141  tx-fifo-depth:
142    $ref: /schemas/types.yaml#/definitions/uint32
143    description:
144      The size of the controller\'s transmit fifo in bytes. This
145      is used for components that can have configurable fifo sizes.
146
147  managed:
148    description:
149      Specifies the PHY management type. If auto is set and fixed-link
150      is not specified, it uses MDIO for management.
151    $ref: /schemas/types.yaml#/definitions/string
152    default: auto
153    enum:
154      - auto
155      - in-band-status
156
157  fixed-link:
158    oneOf:
159      - $ref: /schemas/types.yaml#/definitions/uint32-array
160        deprecated: true
161        items:
162          - minimum: 0
163            maximum: 31
164            description:
165              Emulated PHY ID, choose any but unique to the all
166              specified fixed-links
167
168          - enum: [0, 1]
169            description:
170              Duplex configuration. 0 for half duplex or 1 for
171              full duplex
172
173          - enum: [10, 100, 1000, 2500, 10000]
174            description:
175              Link speed in Mbits/sec.
176
177          - enum: [0, 1]
178            description:
179              Pause configuration. 0 for no pause, 1 for pause
180
181          - enum: [0, 1]
182            description:
183              Asymmetric pause configuration. 0 for no asymmetric
184              pause, 1 for asymmetric pause
185      - type: object
186        additionalProperties: false
187        properties:
188          speed:
189            description:
190              Link speed.
191            $ref: /schemas/types.yaml#/definitions/uint32
192            enum: [10, 100, 1000, 2500, 10000]
193
194          full-duplex:
195            $ref: /schemas/types.yaml#/definitions/flag
196            description:
197              Indicates that full-duplex is used. When absent, half
198              duplex is assumed.
199
200          pause:
201            $ref: /schemas/types.yaml#definitions/flag
202            description:
203              Indicates that pause should be enabled.
204
205          asym-pause:
206            $ref: /schemas/types.yaml#/definitions/flag
207            description:
208              Indicates that asym_pause should be enabled.
209
210          link-gpios:
211            maxItems: 1
212            description:
213              GPIO to determine if the link is up
214
215        required:
216          - speed
217
218allOf:
219  - if:
220      properties:
221        phy-mode:
222          contains:
223            enum:
224              - rgmii
225              - rgmii-rxid
226              - rgmii-txid
227              - rgmii-id
228    then:
229      properties:
230        rx-internal-delay-ps:
231          description:
232            RGMII Receive Clock Delay defined in pico seconds.This is used for
233            controllers that have configurable RX internal delays. If this
234            property is present then the MAC applies the RX delay.
235        tx-internal-delay-ps:
236          description:
237            RGMII Transmit Clock Delay defined in pico seconds.This is used for
238            controllers that have configurable TX internal delays. If this
239            property is present then the MAC applies the TX delay.
240
241additionalProperties: true
242
243...
244