1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm IPQ40xx MDIO Controller Device Tree Bindings
8
9maintainers:
10  - Robert Marko <robert.marko@sartura.hr>
11
12allOf:
13  - $ref: "mdio.yaml#"
14
15properties:
16  compatible:
17    enum:
18      - qcom,ipq4019-mdio
19      - qcom,ipq5018-mdio
20
21  "#address-cells":
22    const: 1
23
24  "#size-cells":
25    const: 0
26
27  reg:
28    minItems: 1
29    maxItems: 2
30    description:
31      the first Address and length of the register set for the MDIO controller.
32      the second Address and length of the register for ethernet LDO, this second
33      address range is only required by the platform IPQ50xx.
34
35  clocks:
36    maxItems: 1
37    description: |
38      MDIO clock source frequency fixed to 100MHZ, this clock should be specified
39      by the platform IPQ807x, IPQ60xx and IPQ50xx.
40
41required:
42  - compatible
43  - reg
44  - "#address-cells"
45  - "#size-cells"
46
47unevaluatedProperties: false
48
49examples:
50  - |
51    mdio@90000 {
52      #address-cells = <1>;
53      #size-cells = <0>;
54      compatible = "qcom,ipq4019-mdio";
55      reg = <0x90000 0x64>;
56
57      ethphy0: ethernet-phy@0 {
58        reg = <0>;
59      };
60
61      ethphy1: ethernet-phy@1 {
62        reg = <1>;
63      };
64
65      ethphy2: ethernet-phy@2 {
66        reg = <2>;
67      };
68
69      ethphy3: ethernet-phy@3 {
70        reg = <3>;
71      };
72
73      ethphy4: ethernet-phy@4 {
74        reg = <4>;
75      };
76    };
77