1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/nvmem/socionext,uniphier-efuse.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Socionext UniPhier eFuse bindings
8
9maintainers:
10  - Keiji Hayashibara <hayashibara.keiji@socionext.com>
11  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
12
13allOf:
14  - $ref: "nvmem.yaml#"
15
16properties:
17  "#address-cells": true
18  "#size-cells": true
19
20  compatible:
21    const: socionext,uniphier-efuse
22
23  reg:
24    maxItems: 1
25
26required:
27  - compatible
28  - reg
29
30unevaluatedProperties: false
31
32examples:
33  - |
34    // The UniPhier eFuse should be a subnode of a "soc-glue" node.
35
36    soc-glue@5f900000 {
37        compatible = "simple-mfd";
38        #address-cells = <1>;
39        #size-cells = <1>;
40        ranges = <0x0 0x5f900000 0x2000>;
41
42        efuse@100 {
43            compatible = "socionext,uniphier-efuse";
44            reg = <0x100 0x28>;
45        };
46
47        efuse@200 {
48            compatible = "socionext,uniphier-efuse";
49            reg = <0x200 0x68>;
50            #address-cells = <1>;
51            #size-cells = <1>;
52
53            /* Data cells */
54            usb_rterm0: trim@54,4 {
55                reg = <0x54 1>;
56                bits = <4 2>;
57            };
58            usb_rterm1: trim@55,4 {
59                reg = <0x55 1>;
60                bits = <4 2>;
61            };
62            usb_rterm2: trim@58,4 {
63                reg = <0x58 1>;
64                bits = <4 2>;
65            };
66            usb_rterm3: trim@59,4 {
67                reg = <0x59 1>;
68                bits = <4 2>;
69            };
70            usb_sel_t0: trim@54,0 {
71                reg = <0x54 1>;
72                bits = <0 4>;
73            };
74            usb_sel_t1: trim@55,0 {
75                reg = <0x55 1>;
76                bits = <0 4>;
77            };
78            usb_sel_t2: trim@58,0 {
79                reg = <0x58 1>;
80                bits = <0 4>;
81            };
82            usb_sel_t3: trim@59,0 {
83                reg = <0x59 1>;
84                bits = <0 4>;
85            };
86            usb_hs_i0: trim@56,0 {
87                reg = <0x56 1>;
88                bits = <0 4>;
89            };
90            usb_hs_i2: trim@5a,0 {
91                reg = <0x5a 1>;
92                bits = <0 4>;
93            };
94        };
95    };
96