1*8bab661aSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*8bab661aSEmmanuel Vadot%YAML 1.2 3*8bab661aSEmmanuel Vadot--- 4*8bab661aSEmmanuel Vadot$id: http://devicetree.org/schemas/pci/baikal,bt1-pcie.yaml# 5*8bab661aSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*8bab661aSEmmanuel Vadot 7*8bab661aSEmmanuel Vadottitle: Baikal-T1 PCIe Root Port Controller 8*8bab661aSEmmanuel Vadot 9*8bab661aSEmmanuel Vadotmaintainers: 10*8bab661aSEmmanuel Vadot - Serge Semin <fancer.lancer@gmail.com> 11*8bab661aSEmmanuel Vadot 12*8bab661aSEmmanuel Vadotdescription: 13*8bab661aSEmmanuel Vadot Embedded into Baikal-T1 SoC Root Complex controller with a single port 14*8bab661aSEmmanuel Vadot activated. It's based on the DWC RC PCIe v4.60a IP-core, which is configured 15*8bab661aSEmmanuel Vadot to have just a single Root Port function and is capable of establishing the 16*8bab661aSEmmanuel Vadot link up to Gen.3 speed on x4 lanes. It doesn't have embedded clock and reset 17*8bab661aSEmmanuel Vadot control module, so the proper interface initialization is supposed to be 18*8bab661aSEmmanuel Vadot performed by software. There four in- and four outbound iATU regions 19*8bab661aSEmmanuel Vadot which can be used to emit all required TLP types on the PCIe bus. 20*8bab661aSEmmanuel Vadot 21*8bab661aSEmmanuel VadotallOf: 22*8bab661aSEmmanuel Vadot - $ref: /schemas/pci/snps,dw-pcie.yaml# 23*8bab661aSEmmanuel Vadot 24*8bab661aSEmmanuel Vadotproperties: 25*8bab661aSEmmanuel Vadot compatible: 26*8bab661aSEmmanuel Vadot const: baikal,bt1-pcie 27*8bab661aSEmmanuel Vadot 28*8bab661aSEmmanuel Vadot reg: 29*8bab661aSEmmanuel Vadot description: 30*8bab661aSEmmanuel Vadot DBI, DBI2 and at least 4KB outbound iATU-capable region for the 31*8bab661aSEmmanuel Vadot peripheral devices CFG-space access. 32*8bab661aSEmmanuel Vadot maxItems: 3 33*8bab661aSEmmanuel Vadot 34*8bab661aSEmmanuel Vadot reg-names: 35*8bab661aSEmmanuel Vadot items: 36*8bab661aSEmmanuel Vadot - const: dbi 37*8bab661aSEmmanuel Vadot - const: dbi2 38*8bab661aSEmmanuel Vadot - const: config 39*8bab661aSEmmanuel Vadot 40*8bab661aSEmmanuel Vadot interrupts: 41*8bab661aSEmmanuel Vadot description: 42*8bab661aSEmmanuel Vadot MSI, AER, PME, Hot-plug, Link Bandwidth Management, Link Equalization 43*8bab661aSEmmanuel Vadot request and eight Read/Write eDMA IRQ lines are available. 44*8bab661aSEmmanuel Vadot maxItems: 14 45*8bab661aSEmmanuel Vadot 46*8bab661aSEmmanuel Vadot interrupt-names: 47*8bab661aSEmmanuel Vadot items: 48*8bab661aSEmmanuel Vadot - const: dma0 49*8bab661aSEmmanuel Vadot - const: dma1 50*8bab661aSEmmanuel Vadot - const: dma2 51*8bab661aSEmmanuel Vadot - const: dma3 52*8bab661aSEmmanuel Vadot - const: dma4 53*8bab661aSEmmanuel Vadot - const: dma5 54*8bab661aSEmmanuel Vadot - const: dma6 55*8bab661aSEmmanuel Vadot - const: dma7 56*8bab661aSEmmanuel Vadot - const: msi 57*8bab661aSEmmanuel Vadot - const: aer 58*8bab661aSEmmanuel Vadot - const: pme 59*8bab661aSEmmanuel Vadot - const: hp 60*8bab661aSEmmanuel Vadot - const: bw_mg 61*8bab661aSEmmanuel Vadot - const: l_eq 62*8bab661aSEmmanuel Vadot 63*8bab661aSEmmanuel Vadot clocks: 64*8bab661aSEmmanuel Vadot description: 65*8bab661aSEmmanuel Vadot DBI (attached to the APB bus), AXI-bus master and slave interfaces 66*8bab661aSEmmanuel Vadot are fed up by the dedicated application clocks. A common reference 67*8bab661aSEmmanuel Vadot clock signal is supposed to be attached to the corresponding Ref-pad 68*8bab661aSEmmanuel Vadot of the SoC. It will be redistributed amongst the controller core 69*8bab661aSEmmanuel Vadot sub-modules (pipe, core, aux, etc). 70*8bab661aSEmmanuel Vadot maxItems: 4 71*8bab661aSEmmanuel Vadot 72*8bab661aSEmmanuel Vadot clock-names: 73*8bab661aSEmmanuel Vadot items: 74*8bab661aSEmmanuel Vadot - const: dbi 75*8bab661aSEmmanuel Vadot - const: mstr 76*8bab661aSEmmanuel Vadot - const: slv 77*8bab661aSEmmanuel Vadot - const: ref 78*8bab661aSEmmanuel Vadot 79*8bab661aSEmmanuel Vadot resets: 80*8bab661aSEmmanuel Vadot description: 81*8bab661aSEmmanuel Vadot A comprehensive controller reset logic is supposed to be implemented 82*8bab661aSEmmanuel Vadot by software, so almost all the possible application and core reset 83*8bab661aSEmmanuel Vadot signals are exposed via the system CCU module. 84*8bab661aSEmmanuel Vadot maxItems: 9 85*8bab661aSEmmanuel Vadot 86*8bab661aSEmmanuel Vadot reset-names: 87*8bab661aSEmmanuel Vadot items: 88*8bab661aSEmmanuel Vadot - const: mstr 89*8bab661aSEmmanuel Vadot - const: slv 90*8bab661aSEmmanuel Vadot - const: pwr 91*8bab661aSEmmanuel Vadot - const: hot 92*8bab661aSEmmanuel Vadot - const: phy 93*8bab661aSEmmanuel Vadot - const: core 94*8bab661aSEmmanuel Vadot - const: pipe 95*8bab661aSEmmanuel Vadot - const: sticky 96*8bab661aSEmmanuel Vadot - const: non-sticky 97*8bab661aSEmmanuel Vadot 98*8bab661aSEmmanuel Vadot baikal,bt1-syscon: 99*8bab661aSEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/phandle 100*8bab661aSEmmanuel Vadot description: 101*8bab661aSEmmanuel Vadot Phandle to the Baikal-T1 System Controller DT node. It's required to 102*8bab661aSEmmanuel Vadot access some additional PM, Reset-related and LTSSM signals. 103*8bab661aSEmmanuel Vadot 104*8bab661aSEmmanuel Vadot num-lanes: 105*8bab661aSEmmanuel Vadot maximum: 4 106*8bab661aSEmmanuel Vadot 107*8bab661aSEmmanuel Vadot max-link-speed: 108*8bab661aSEmmanuel Vadot maximum: 3 109*8bab661aSEmmanuel Vadot 110*8bab661aSEmmanuel Vadotrequired: 111*8bab661aSEmmanuel Vadot - compatible 112*8bab661aSEmmanuel Vadot - reg 113*8bab661aSEmmanuel Vadot - reg-names 114*8bab661aSEmmanuel Vadot - interrupts 115*8bab661aSEmmanuel Vadot - interrupt-names 116*8bab661aSEmmanuel Vadot 117*8bab661aSEmmanuel VadotunevaluatedProperties: false 118*8bab661aSEmmanuel Vadot 119*8bab661aSEmmanuel Vadotexamples: 120*8bab661aSEmmanuel Vadot - | 121*8bab661aSEmmanuel Vadot #include <dt-bindings/interrupt-controller/mips-gic.h> 122*8bab661aSEmmanuel Vadot #include <dt-bindings/gpio/gpio.h> 123*8bab661aSEmmanuel Vadot 124*8bab661aSEmmanuel Vadot pcie@1f052000 { 125*8bab661aSEmmanuel Vadot compatible = "baikal,bt1-pcie"; 126*8bab661aSEmmanuel Vadot device_type = "pci"; 127*8bab661aSEmmanuel Vadot reg = <0x1f052000 0x1000>, <0x1f053000 0x1000>, <0x1bdbf000 0x1000>; 128*8bab661aSEmmanuel Vadot reg-names = "dbi", "dbi2", "config"; 129*8bab661aSEmmanuel Vadot #address-cells = <3>; 130*8bab661aSEmmanuel Vadot #size-cells = <2>; 131*8bab661aSEmmanuel Vadot ranges = <0x81000000 0 0x00000000 0x1bdb0000 0 0x00008000>, 132*8bab661aSEmmanuel Vadot <0x82000000 0 0x20000000 0x08000000 0 0x13db0000>; 133*8bab661aSEmmanuel Vadot bus-range = <0x0 0xff>; 134*8bab661aSEmmanuel Vadot 135*8bab661aSEmmanuel Vadot interrupts = <GIC_SHARED 80 IRQ_TYPE_LEVEL_HIGH>, 136*8bab661aSEmmanuel Vadot <GIC_SHARED 81 IRQ_TYPE_LEVEL_HIGH>, 137*8bab661aSEmmanuel Vadot <GIC_SHARED 82 IRQ_TYPE_LEVEL_HIGH>, 138*8bab661aSEmmanuel Vadot <GIC_SHARED 83 IRQ_TYPE_LEVEL_HIGH>, 139*8bab661aSEmmanuel Vadot <GIC_SHARED 84 IRQ_TYPE_LEVEL_HIGH>, 140*8bab661aSEmmanuel Vadot <GIC_SHARED 85 IRQ_TYPE_LEVEL_HIGH>, 141*8bab661aSEmmanuel Vadot <GIC_SHARED 86 IRQ_TYPE_LEVEL_HIGH>, 142*8bab661aSEmmanuel Vadot <GIC_SHARED 87 IRQ_TYPE_LEVEL_HIGH>, 143*8bab661aSEmmanuel Vadot <GIC_SHARED 88 IRQ_TYPE_LEVEL_HIGH>, 144*8bab661aSEmmanuel Vadot <GIC_SHARED 89 IRQ_TYPE_LEVEL_HIGH>, 145*8bab661aSEmmanuel Vadot <GIC_SHARED 90 IRQ_TYPE_LEVEL_HIGH>, 146*8bab661aSEmmanuel Vadot <GIC_SHARED 91 IRQ_TYPE_LEVEL_HIGH>, 147*8bab661aSEmmanuel Vadot <GIC_SHARED 92 IRQ_TYPE_LEVEL_HIGH>, 148*8bab661aSEmmanuel Vadot <GIC_SHARED 93 IRQ_TYPE_LEVEL_HIGH>; 149*8bab661aSEmmanuel Vadot interrupt-names = "dma0", "dma1", "dma2", "dma3", 150*8bab661aSEmmanuel Vadot "dma4", "dma5", "dma6", "dma7", 151*8bab661aSEmmanuel Vadot "msi", "aer", "pme", "hp", "bw_mg", 152*8bab661aSEmmanuel Vadot "l_eq"; 153*8bab661aSEmmanuel Vadot 154*8bab661aSEmmanuel Vadot clocks = <&ccu_sys 1>, <&ccu_axi 6>, <&ccu_axi 7>, <&clk_pcie>; 155*8bab661aSEmmanuel Vadot clock-names = "dbi", "mstr", "slv", "ref"; 156*8bab661aSEmmanuel Vadot 157*8bab661aSEmmanuel Vadot resets = <&ccu_axi 6>, <&ccu_axi 7>, <&ccu_sys 7>, <&ccu_sys 10>, 158*8bab661aSEmmanuel Vadot <&ccu_sys 4>, <&ccu_sys 6>, <&ccu_sys 5>, <&ccu_sys 8>, 159*8bab661aSEmmanuel Vadot <&ccu_sys 9>; 160*8bab661aSEmmanuel Vadot reset-names = "mstr", "slv", "pwr", "hot", "phy", "core", "pipe", 161*8bab661aSEmmanuel Vadot "sticky", "non-sticky"; 162*8bab661aSEmmanuel Vadot 163*8bab661aSEmmanuel Vadot reset-gpios = <&port0 0 GPIO_ACTIVE_LOW>; 164*8bab661aSEmmanuel Vadot 165*8bab661aSEmmanuel Vadot num-lanes = <4>; 166*8bab661aSEmmanuel Vadot max-link-speed = <3>; 167*8bab661aSEmmanuel Vadot }; 168*8bab661aSEmmanuel Vadot... 169