1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-ufs-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QMP PHY controller (UFS, MSM8996)
8
9maintainers:
10  - Vinod Koul <vkoul@kernel.org>
11
12description:
13  QMP PHY controller supports physical layer functionality for a number of
14  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
15
16  Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see
17  qcom,sc8280xp-qmp-ufs-phy.yaml.
18
19properties:
20  compatible:
21    enum:
22      - qcom,msm8996-qmp-ufs-phy
23      - qcom,msm8998-qmp-ufs-phy
24      - qcom,sc8180x-qmp-ufs-phy
25      - qcom,sdm845-qmp-ufs-phy
26      - qcom,sm6115-qmp-ufs-phy
27      - qcom,sm6350-qmp-ufs-phy
28      - qcom,sm8150-qmp-ufs-phy
29      - qcom,sm8250-qmp-ufs-phy
30      - qcom,sm8350-qmp-ufs-phy
31      - qcom,sm8450-qmp-ufs-phy
32
33  reg:
34    items:
35      - description: serdes
36
37  "#address-cells":
38    enum: [ 1, 2 ]
39
40  "#size-cells":
41    enum: [ 1, 2 ]
42
43  ranges: true
44
45  clocks:
46    minItems: 1
47    maxItems: 3
48
49  clock-names:
50    minItems: 1
51    maxItems: 3
52
53  power-domains:
54    maxItems: 1
55
56  resets:
57    maxItems: 1
58
59  reset-names:
60    items:
61      - const: ufsphy
62
63  vdda-phy-supply: true
64
65  vdda-pll-supply: true
66
67  vddp-ref-clk-supply: true
68
69patternProperties:
70  "^phy@[0-9a-f]+$":
71    type: object
72    description: single PHY-provider child node
73    properties:
74      reg:
75        minItems: 3
76        maxItems: 6
77
78      "#clock-cells":
79        const: 1
80
81      "#phy-cells":
82        const: 0
83
84    required:
85      - reg
86      - "#phy-cells"
87
88    additionalProperties: false
89
90required:
91  - compatible
92  - reg
93  - "#address-cells"
94  - "#size-cells"
95  - ranges
96  - clocks
97  - clock-names
98  - resets
99  - reset-names
100  - vdda-phy-supply
101  - vdda-pll-supply
102
103additionalProperties: false
104
105allOf:
106  - if:
107      properties:
108        compatible:
109          contains:
110            enum:
111              - qcom,msm8996-qmp-ufs-phy
112    then:
113      properties:
114        clocks:
115          maxItems: 1
116        clock-names:
117          items:
118            - const: ref
119
120  - if:
121      properties:
122        compatible:
123          contains:
124            enum:
125              - qcom,msm8998-qmp-ufs-phy
126              - qcom,sc8180x-qmp-ufs-phy
127              - qcom,sdm845-qmp-ufs-phy
128              - qcom,sm6115-qmp-ufs-phy
129              - qcom,sm6350-qmp-ufs-phy
130              - qcom,sm8150-qmp-ufs-phy
131              - qcom,sm8250-qmp-ufs-phy
132    then:
133      properties:
134        clocks:
135          maxItems: 2
136        clock-names:
137          items:
138            - const: ref
139            - const: ref_aux
140
141  - if:
142      properties:
143        compatible:
144          contains:
145            enum:
146              - qcom,sm8450-qmp-ufs-phy
147    then:
148      properties:
149        clocks:
150          maxItems: 3
151        clock-names:
152          items:
153            - const: ref
154            - const: ref_aux
155            - const: qref
156
157  - if:
158      properties:
159        compatible:
160          contains:
161            enum:
162              - qcom,msm8998-qmp-ufs-phy
163              - qcom,sc8180x-qmp-ufs-phy
164              - qcom,sdm845-qmp-ufs-phy
165              - qcom,sm6350-qmp-ufs-phy
166              - qcom,sm8150-qmp-ufs-phy
167              - qcom,sm8250-qmp-ufs-phy
168              - qcom,sm8350-qmp-ufs-phy
169              - qcom,sm8450-qmp-ufs-phy
170    then:
171      patternProperties:
172        "^phy@[0-9a-f]+$":
173          properties:
174            reg:
175              items:
176                - description: TX lane 1
177                - description: RX lane 1
178                - description: PCS
179                - description: TX lane 2
180                - description: RX lane 2
181
182  - if:
183      properties:
184        compatible:
185          contains:
186            enum:
187              - qcom,msm8996-qmp-ufs-phy
188              - qcom,sm6115-qmp-ufs-phy
189    then:
190      patternProperties:
191        "^phy@[0-9a-f]+$":
192          properties:
193            reg:
194              items:
195                - description: TX
196                - description: RX
197                - description: PCS
198
199examples:
200  - |
201    #include <dt-bindings/clock/qcom,gcc-sm8250.h>
202    #include <dt-bindings/clock/qcom,rpmh.h>
203
204    phy-wrapper@1d87000 {
205        compatible = "qcom,sm8250-qmp-ufs-phy";
206        reg = <0x01d87000 0x1c0>;
207        #address-cells = <1>;
208        #size-cells = <1>;
209        ranges = <0x0 0x01d87000 0x1000>;
210
211        clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
212        clock-names = "ref", "ref_aux";
213
214        resets = <&ufs_mem_hc 0>;
215        reset-names = "ufsphy";
216
217        vdda-phy-supply = <&vreg_l6b>;
218        vdda-pll-supply = <&vreg_l3b>;
219
220        phy@400 {
221            reg = <0x400 0x108>,
222                  <0x600 0x1e0>,
223                  <0xc00 0x1dc>,
224                  <0x800 0x108>,
225                  <0xa00 0x1e0>;
226            #phy-cells = <0>;
227        };
228    };
229