1*c66ec88fSEmmanuel Vadot*ST pin controller. 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotEach multi-function pin is controlled, driven and routed through the 4*c66ec88fSEmmanuel VadotPIO multiplexing block. Each pin supports GPIO functionality (ALT0) 5*c66ec88fSEmmanuel Vadotand multiple alternate functions(ALT1 - ALTx) that directly connect 6*c66ec88fSEmmanuel Vadotthe pin to different hardware blocks. 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel VadotWhen a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and 9*c66ec88fSEmmanuel VadotPull Up (PU) are driven by the related PIO block. 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel VadotST pinctrl driver controls PIO multiplexing block and also interacts with 12*c66ec88fSEmmanuel Vadotgpio driver to configure a pin. 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel VadotGPIO bank can have one of the two possible types of interrupt-wirings. 15*c66ec88fSEmmanuel Vadot 16*c66ec88fSEmmanuel VadotFirst type is via irqmux, single interrupt is used by multiple gpio banks. This 17*c66ec88fSEmmanuel Vadotreduces number of overall interrupts numbers required. All these banks belong to 18*c66ec88fSEmmanuel Vadota single pincontroller. 19*c66ec88fSEmmanuel Vadot _________ 20*c66ec88fSEmmanuel Vadot | |----> [gpio-bank (n) ] 21*c66ec88fSEmmanuel Vadot | |----> [gpio-bank (n + 1)] 22*c66ec88fSEmmanuel Vadot [irqN]-- | irq-mux |----> [gpio-bank (n + 2)] 23*c66ec88fSEmmanuel Vadot | |----> [gpio-bank (... )] 24*c66ec88fSEmmanuel Vadot |_________|----> [gpio-bank (n + 7)] 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel VadotSecond type has a dedicated interrupt per gpio bank. 27*c66ec88fSEmmanuel Vadot 28*c66ec88fSEmmanuel Vadot [irqN]----> [gpio-bank (n)] 29*c66ec88fSEmmanuel Vadot 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel VadotPin controller node: 32*c66ec88fSEmmanuel VadotRequired properties: 33*c66ec88fSEmmanuel Vadot- compatible : should be "st,stih407-<pio-block>-pinctrl" 34*c66ec88fSEmmanuel Vadot- st,syscfg : Should be a phandle of the syscfg node. 35*c66ec88fSEmmanuel Vadot- st,retime-pin-mask : Should be mask to specify which pins can be retimed. 36*c66ec88fSEmmanuel Vadot If the property is not present, it is assumed that all the pins in the 37*c66ec88fSEmmanuel Vadot bank are capable of retiming. Retiming is mainly used to improve the 38*c66ec88fSEmmanuel Vadot IO timing margins of external synchronous interfaces. 39*c66ec88fSEmmanuel Vadot- ranges : defines mapping between pin controller node (parent) to gpio-bank 40*c66ec88fSEmmanuel Vadot node (children). 41*c66ec88fSEmmanuel Vadot 42*c66ec88fSEmmanuel VadotOptional properties: 43*c66ec88fSEmmanuel Vadot- interrupts : Interrupt number of the irqmux. If the interrupt is shared 44*c66ec88fSEmmanuel Vadot with other gpio banks via irqmux. 45*c66ec88fSEmmanuel Vadot a irqline and gpio banks. 46*c66ec88fSEmmanuel Vadot- reg : irqmux memory resource. If irqmux is present. 47*c66ec88fSEmmanuel Vadot- reg-names : irqmux resource should be named as "irqmux". 48*c66ec88fSEmmanuel Vadot 49*c66ec88fSEmmanuel VadotGPIO controller/bank node. 50*c66ec88fSEmmanuel VadotRequired properties: 51*c66ec88fSEmmanuel Vadot- gpio-controller : Indicates this device is a GPIO controller 52*c66ec88fSEmmanuel Vadot- #gpio-cells : Must be two. 53*c66ec88fSEmmanuel Vadot - First cell: specifies the pin number inside the controller 54*c66ec88fSEmmanuel Vadot - Second cell: specifies whether the pin is logically inverted. 55*c66ec88fSEmmanuel Vadot - 0 = active high 56*c66ec88fSEmmanuel Vadot - 1 = active low 57*c66ec88fSEmmanuel Vadot- st,bank-name : Should be a name string for this bank as specified in 58*c66ec88fSEmmanuel Vadot datasheet. 59*c66ec88fSEmmanuel Vadot 60*c66ec88fSEmmanuel VadotOptional properties: 61*c66ec88fSEmmanuel Vadot- interrupts : Interrupt number for this gpio bank. If there is a dedicated 62*c66ec88fSEmmanuel Vadot interrupt wired up for this gpio bank. 63*c66ec88fSEmmanuel Vadot 64*c66ec88fSEmmanuel Vadot- interrupt-controller : Indicates this device is a interrupt controller. GPIO 65*c66ec88fSEmmanuel Vadot bank can be an interrupt controller iff one of the interrupt type either via 66*c66ec88fSEmmanuel Vadotirqmux or a dedicated interrupt per bank is specified. 67*c66ec88fSEmmanuel Vadot 68*c66ec88fSEmmanuel Vadot- #interrupt-cells: the value of this property should be 2. 69*c66ec88fSEmmanuel Vadot - First Cell: represents the external gpio interrupt number local to the 70*c66ec88fSEmmanuel Vadot gpio interrupt space of the controller. 71*c66ec88fSEmmanuel Vadot - Second Cell: flags to identify the type of the interrupt 72*c66ec88fSEmmanuel Vadot - 1 = rising edge triggered 73*c66ec88fSEmmanuel Vadot - 2 = falling edge triggered 74*c66ec88fSEmmanuel Vadot - 3 = rising and falling edge triggered 75*c66ec88fSEmmanuel Vadot - 4 = high level triggered 76*c66ec88fSEmmanuel Vadot - 8 = low level triggered 77*c66ec88fSEmmanuel Vadotfor related macros look in: 78*c66ec88fSEmmanuel Vadotinclude/dt-bindings/interrupt-controller/irq.h 79*c66ec88fSEmmanuel Vadot 80*c66ec88fSEmmanuel VadotExample: 81*c66ec88fSEmmanuel Vadot pin-controller-sbc { 82*c66ec88fSEmmanuel Vadot #address-cells = <1>; 83*c66ec88fSEmmanuel Vadot #size-cells = <1>; 84*c66ec88fSEmmanuel Vadot compatible = "st,stih407-sbc-pinctrl"; 85*c66ec88fSEmmanuel Vadot st,syscfg = <&syscfg_sbc>; 86*c66ec88fSEmmanuel Vadot reg = <0x0961f080 0x4>; 87*c66ec88fSEmmanuel Vadot reg-names = "irqmux"; 88*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>; 89*c66ec88fSEmmanuel Vadot interrupt-names = "irqmux"; 90*c66ec88fSEmmanuel Vadot ranges = <0 0x09610000 0x6000>; 91*c66ec88fSEmmanuel Vadot 92*c66ec88fSEmmanuel Vadot pio0: gpio@9610000 { 93*c66ec88fSEmmanuel Vadot gpio-controller; 94*c66ec88fSEmmanuel Vadot #gpio-cells = <2>; 95*c66ec88fSEmmanuel Vadot interrupt-controller; 96*c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 97*c66ec88fSEmmanuel Vadot reg = <0x0 0x100>; 98*c66ec88fSEmmanuel Vadot st,bank-name = "PIO0"; 99*c66ec88fSEmmanuel Vadot }; 100*c66ec88fSEmmanuel Vadot ... 101*c66ec88fSEmmanuel Vadot pin-functions nodes follow... 102*c66ec88fSEmmanuel Vadot }; 103*c66ec88fSEmmanuel Vadot 104*c66ec88fSEmmanuel Vadot 105*c66ec88fSEmmanuel VadotContents of function subnode node: 106*c66ec88fSEmmanuel Vadot---------------------- 107*c66ec88fSEmmanuel VadotRequired properties for pin configuration node: 108*c66ec88fSEmmanuel Vadot- st,pins : Child node with list of pins with configuration. 109*c66ec88fSEmmanuel Vadot 110*c66ec88fSEmmanuel VadotBelow is the format of how each pin conf should look like. 111*c66ec88fSEmmanuel Vadot 112*c66ec88fSEmmanuel Vadot<bank offset mux mode rt_type rt_delay rt_clk> 113*c66ec88fSEmmanuel Vadot 114*c66ec88fSEmmanuel VadotEvery PIO is represented with 4-7 parameters depending on retime configuration. 115*c66ec88fSEmmanuel VadotEach parameter is explained as below. 116*c66ec88fSEmmanuel Vadot 117*c66ec88fSEmmanuel Vadot-bank : Should be bank phandle to which this PIO belongs. 118*c66ec88fSEmmanuel Vadot-offset : Offset in the PIO bank. 119*c66ec88fSEmmanuel Vadot-mux : Should be alternate function number associated this pin. 120*c66ec88fSEmmanuel Vadot Use same numbers from datasheet. 121*c66ec88fSEmmanuel Vadot-mode :pin configuration is selected from one of the below values. 122*c66ec88fSEmmanuel Vadot IN 123*c66ec88fSEmmanuel Vadot IN_PU 124*c66ec88fSEmmanuel Vadot OUT 125*c66ec88fSEmmanuel Vadot BIDIR 126*c66ec88fSEmmanuel Vadot BIDIR_PU 127*c66ec88fSEmmanuel Vadot 128*c66ec88fSEmmanuel Vadot-rt_type Retiming Configuration for the pin. 129*c66ec88fSEmmanuel Vadot Possible retime configuration are: 130*c66ec88fSEmmanuel Vadot 131*c66ec88fSEmmanuel Vadot ------- ------------- 132*c66ec88fSEmmanuel Vadot value args 133*c66ec88fSEmmanuel Vadot ------- ------------- 134*c66ec88fSEmmanuel Vadot NICLK <delay> <clk> 135*c66ec88fSEmmanuel Vadot ICLK_IO <delay> <clk> 136*c66ec88fSEmmanuel Vadot BYPASS <delay> 137*c66ec88fSEmmanuel Vadot DE_IO <delay> <clk> 138*c66ec88fSEmmanuel Vadot SE_ICLK_IO <delay> <clk> 139*c66ec88fSEmmanuel Vadot SE_NICLK_IO <delay> <clk> 140*c66ec88fSEmmanuel Vadot 141*c66ec88fSEmmanuel Vadot- delay is retime delay in pico seconds as mentioned in data sheet. 142*c66ec88fSEmmanuel Vadot 143*c66ec88fSEmmanuel Vadot- rt_clk :clk to be use for retime. 144*c66ec88fSEmmanuel Vadot Possible values are: 145*c66ec88fSEmmanuel Vadot CLK_A 146*c66ec88fSEmmanuel Vadot CLK_B 147*c66ec88fSEmmanuel Vadot CLK_C 148*c66ec88fSEmmanuel Vadot CLK_D 149*c66ec88fSEmmanuel Vadot 150*c66ec88fSEmmanuel VadotExample of mmcclk pin which is a bi-direction pull pu with retime config 151*c66ec88fSEmmanuel Vadotas non inverted clock retimed with CLK_B and delay of 0 pico seconds: 152*c66ec88fSEmmanuel Vadot 153*c66ec88fSEmmanuel Vadotpin-controller { 154*c66ec88fSEmmanuel Vadot ... 155*c66ec88fSEmmanuel Vadot mmc0 { 156*c66ec88fSEmmanuel Vadot pinctrl_mmc: mmc { 157*c66ec88fSEmmanuel Vadot st,pins { 158*c66ec88fSEmmanuel Vadot mmcclk = <&PIO13 4 ALT4 BIDIR_PU NICLK 0 CLK_B>; 159*c66ec88fSEmmanuel Vadot ... 160*c66ec88fSEmmanuel Vadot }; 161*c66ec88fSEmmanuel Vadot }; 162*c66ec88fSEmmanuel Vadot ... 163*c66ec88fSEmmanuel Vadot }; 164*c66ec88fSEmmanuel Vadot}; 165*c66ec88fSEmmanuel Vadot 166*c66ec88fSEmmanuel Vadotsdhci0:sdhci@fe810000{ 167*c66ec88fSEmmanuel Vadot ... 168*c66ec88fSEmmanuel Vadot interrupt-parent = <&pio3>; 169*c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 170*c66ec88fSEmmanuel Vadot interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; /* Interrupt line via PIO3-3 */ 171*c66ec88fSEmmanuel Vadot interrupt-names = "card-detect"; 172*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 173*c66ec88fSEmmanuel Vadot pinctrl-0 = <&pinctrl_mmc>; 174*c66ec88fSEmmanuel Vadot}; 175