1Qualcomm PMIC GPIO block
2
3This binding describes the GPIO block(s) found in the 8xxx series of
4PMIC's from Qualcomm.
5
6- compatible:
7	Usage: required
8	Value type: <string>
9	Definition: must be one of:
10		    "qcom,pm8005-gpio"
11		    "qcom,pm8018-gpio"
12		    "qcom,pm8038-gpio"
13		    "qcom,pm8058-gpio"
14		    "qcom,pm8916-gpio"
15		    "qcom,pm8917-gpio"
16		    "qcom,pm8921-gpio"
17		    "qcom,pm8941-gpio"
18		    "qcom,pm8950-gpio"
19		    "qcom,pm8994-gpio"
20		    "qcom,pm8998-gpio"
21		    "qcom,pma8084-gpio"
22		    "qcom,pmi8950-gpio"
23		    "qcom,pmi8994-gpio"
24		    "qcom,pmi8998-gpio"
25		    "qcom,pms405-gpio"
26		    "qcom,pm660-gpio"
27		    "qcom,pm660l-gpio"
28		    "qcom,pm8150-gpio"
29		    "qcom,pm8150b-gpio"
30		    "qcom,pm8350-gpio"
31		    "qcom,pm8350b-gpio"
32		    "qcom,pm8350c-gpio"
33		    "qcom,pmk8350-gpio"
34		    "qcom,pmr735a-gpio"
35		    "qcom,pmr735b-gpio"
36		    "qcom,pm6150-gpio"
37		    "qcom,pm6150l-gpio"
38		    "qcom,pm8008-gpio"
39		    "qcom,pmx55-gpio"
40
41		    And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
42		    if the device is on an spmi bus or an ssbi bus respectively
43
44- reg:
45	Usage: required
46	Value type: <prop-encoded-array>
47	Definition: Register base of the GPIO block and length.
48
49- interrupts:
50	Usage: required
51	Value type: <prop-encoded-array>
52	Definition: Must contain an array of encoded interrupt specifiers for
53		    each available GPIO
54
55- gpio-controller:
56	Usage: required
57	Value type: <none>
58	Definition: Mark the device node as a GPIO controller
59
60- #gpio-cells:
61	Usage: required
62	Value type: <u32>
63	Definition: Must be 2;
64		    the first cell will be used to define gpio number and the
65		    second denotes the flags for this gpio
66
67Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
68a general description of GPIO and interrupt bindings.
69
70Please refer to pinctrl-bindings.txt in this directory for details of the
71common pinctrl bindings used by client devices, including the meaning of the
72phrase "pin configuration node".
73
74The pin configuration nodes act as a container for an arbitrary number of
75subnodes. Each of these subnodes represents some desired configuration for a
76pin or a list of pins. This configuration can include the
77mux function to select on those pin(s), and various pin configuration
78parameters, as listed below.
79
80
81SUBNODES:
82
83The name of each subnode is not important; all subnodes should be enumerated
84and processed purely based on their content.
85
86Each subnode only affects those parameters that are explicitly listed. In
87other words, a subnode that lists a mux function but no pin configuration
88parameters implies no information about any pin configuration parameters.
89Similarly, a pin subnode that describes a pullup parameter implies no
90information about e.g. the mux function.
91
92The following generic properties as defined in pinctrl-bindings.txt are valid
93to specify in a pin configuration subnode:
94
95- pins:
96	Usage: required
97	Value type: <string-array>
98	Definition: List of gpio pins affected by the properties specified in
99		    this subnode.  Valid pins are:
100		    gpio1-gpio4 for pm8005
101		    gpio1-gpio6 for pm8018
102		    gpio1-gpio12 for pm8038
103		    gpio1-gpio40 for pm8058
104		    gpio1-gpio4 for pm8916
105		    gpio1-gpio38 for pm8917
106		    gpio1-gpio44 for pm8921
107		    gpio1-gpio36 for pm8941
108		    gpio1-gpio8 for pm8950 (hole on gpio3)
109		    gpio1-gpio22 for pm8994
110		    gpio1-gpio26 for pm8998
111		    gpio1-gpio22 for pma8084
112		    gpio1-gpio2 for pmi8950
113		    gpio1-gpio10 for pmi8994
114		    gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10)
115		    gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7
116					     and gpio8)
117		    gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7)
118		    gpio1-gpio12 for pm8150l (hole on gpio7)
119		    gpio1-gpio10 for pm8350
120		    gpio1-gpio8 for pm8350b
121		    gpio1-gpio9 for pm8350c
122		    gpio1-gpio4 for pmk8350
123		    gpio1-gpio4 for pmr735a
124		    gpio1-gpio4 for pmr735b
125		    gpio1-gpio10 for pm6150
126		    gpio1-gpio12 for pm6150l
127		    gpio1-gpio2 for pm8008
128		    gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10
129					    and gpio11)
130
131- function:
132	Usage: required
133	Value type: <string>
134	Definition: Specify the alternative function to be configured for the
135		    specified pins.  Valid values are:
136		    "normal",
137		    "paired",
138		    "func1",
139		    "func2",
140		    "dtest1",
141		    "dtest2",
142		    "dtest3",
143		    "dtest4",
144		    And following values are supported by LV/MV GPIO subtypes:
145		    "func3",
146		    "func4"
147
148- bias-disable:
149	Usage: optional
150	Value type: <none>
151	Definition: The specified pins should be configured as no pull.
152
153- bias-pull-down:
154	Usage: optional
155	Value type: <none>
156	Definition: The specified pins should be configured as pull down.
157
158- bias-pull-up:
159	Usage: optional
160	Value type: <empty>
161	Definition: The specified pins should be configured as pull up.
162
163- qcom,pull-up-strength:
164	Usage: optional
165	Value type: <u32>
166	Definition: Specifies the strength to use for pull up, if selected.
167		    Valid values are; as defined in
168		    <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
169		    1: 30uA                     (PMIC_GPIO_PULL_UP_30)
170		    2: 1.5uA                    (PMIC_GPIO_PULL_UP_1P5)
171		    3: 31.5uA                   (PMIC_GPIO_PULL_UP_31P5)
172		    4: 1.5uA + 30uA boost       (PMIC_GPIO_PULL_UP_1P5_30)
173		    If this property is omitted 30uA strength will be used if
174		    pull up is selected
175
176- bias-high-impedance:
177	Usage: optional
178	Value type: <none>
179	Definition: The specified pins will put in high-Z mode and disabled.
180
181- input-enable:
182	Usage: optional
183	Value type: <none>
184	Definition: The specified pins are put in input mode.
185
186- output-high:
187	Usage: optional
188	Value type: <none>
189	Definition: The specified pins are configured in output mode, driven
190		    high.
191
192- output-low:
193	Usage: optional
194	Value type: <none>
195	Definition: The specified pins are configured in output mode, driven
196		    low.
197
198- power-source:
199	Usage: optional
200	Value type: <u32>
201	Definition: Selects the power source for the specified pins. Valid
202		    power sources are defined per chip in
203		    <dt-bindings/pinctrl/qcom,pmic-gpio.h>
204
205- qcom,drive-strength:
206	Usage: optional
207	Value type: <u32>
208	Definition: Selects the drive strength for the specified pins. Value
209		    drive strengths are:
210		    0: no (PMIC_GPIO_STRENGTH_NO)
211		    1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
212		    2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
213		    3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
214		    as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
215
216- drive-push-pull:
217	Usage: optional
218	Value type: <none>
219	Definition: The specified pins are configured in push-pull mode.
220
221- drive-open-drain:
222	Usage: optional
223	Value type: <none>
224	Definition: The specified pins are configured in open-drain mode.
225
226- drive-open-source:
227	Usage: optional
228	Value type: <none>
229	Definition: The specified pins are configured in open-source mode.
230
231- qcom,analog-pass:
232	Usage: optional
233	Value type: <none>
234	Definition: The specified pins are configured in analog-pass-through mode.
235
236- qcom,atest:
237	Usage: optional
238	Value type: <u32>
239	Definition: Selects ATEST rail to route to GPIO when it's configured
240		    in analog-pass-through mode.
241		    Valid values are 1-4 corresponding to ATEST1 to ATEST4.
242
243- qcom,dtest-buffer:
244	Usage: optional
245	Value type: <u32>
246	Definition: Selects DTEST rail to route to GPIO when it's configured
247		    as digital input.
248		    Valid values are 1-4 corresponding to DTEST1 to DTEST4.
249
250Example:
251
252	pm8921_gpio: gpio@150 {
253		compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
254		reg = <0x150 0x160>;
255		interrupts = <192 1>, <193 1>, <194 1>,
256			     <195 1>, <196 1>, <197 1>,
257			     <198 1>, <199 1>, <200 1>,
258			     <201 1>, <202 1>, <203 1>,
259			     <204 1>, <205 1>, <206 1>,
260			     <207 1>, <208 1>, <209 1>,
261			     <210 1>, <211 1>, <212 1>,
262			     <213 1>, <214 1>, <215 1>,
263			     <216 1>, <217 1>, <218 1>,
264			     <219 1>, <220 1>, <221 1>,
265			     <222 1>, <223 1>, <224 1>,
266			     <225 1>, <226 1>, <227 1>,
267			     <228 1>, <229 1>, <230 1>,
268			     <231 1>, <232 1>, <233 1>,
269			     <234 1>, <235 1>;
270
271		gpio-controller;
272		#gpio-cells = <2>;
273
274		pm8921_gpio_keys: gpio-keys {
275			volume-keys {
276				pins = "gpio20", "gpio21";
277				function = "normal";
278
279				input-enable;
280				bias-pull-up;
281				drive-push-pull;
282				qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
283				power-source = <PM8921_GPIO_S4>;
284			};
285		};
286	};
287