1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/mediatek,mt2712-pwm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek PWM Controller
8
9maintainers:
10  - John Crispin <john@phrozen.org>
11
12allOf:
13  - $ref: pwm.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - enum:
19          - mediatek,mt2712-pwm
20          - mediatek,mt6795-pwm
21          - mediatek,mt7622-pwm
22          - mediatek,mt7623-pwm
23          - mediatek,mt7628-pwm
24          - mediatek,mt7629-pwm
25          - mediatek,mt7986-pwm
26          - mediatek,mt8183-pwm
27          - mediatek,mt8365-pwm
28          - mediatek,mt8516-pwm
29      - items:
30          - enum:
31              - mediatek,mt8195-pwm
32          - const: mediatek,mt8183-pwm
33
34  reg:
35    maxItems: 1
36
37  "#pwm-cells":
38    const: 2
39
40  interrupts:
41    maxItems: 1
42
43  clocks:
44    minItems: 2
45    maxItems: 10
46
47  clock-names:
48    description:
49      This controller needs two input clocks for its core and one
50      clock for each PWM output.
51    minItems: 2
52    items:
53      - const: top
54      - const: main
55      - const: pwm1
56      - const: pwm2
57      - const: pwm3
58      - const: pwm4
59      - const: pwm5
60      - const: pwm6
61      - const: pwm7
62      - const: pwm8
63
64required:
65  - compatible
66  - reg
67  - "#pwm-cells"
68  - clocks
69  - clock-names
70
71additionalProperties: false
72
73examples:
74  - |
75    #include <dt-bindings/interrupt-controller/arm-gic.h>
76    #include <dt-bindings/clock/mt2712-clk.h>
77    #include <dt-bindings/interrupt-controller/irq.h>
78
79    pwm0: pwm@11006000 {
80        compatible = "mediatek,mt2712-pwm";
81        reg = <0x11006000 0x1000>;
82        #pwm-cells = <2>;
83        interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;
84        clocks = <&topckgen CLK_TOP_PWM_SEL>, <&pericfg CLK_PERI_PWM>,
85                 <&pericfg CLK_PERI_PWM0>, <&pericfg CLK_PERI_PWM1>,
86                 <&pericfg CLK_PERI_PWM2>, <&pericfg CLK_PERI_PWM3>,
87                 <&pericfg CLK_PERI_PWM4>, <&pericfg CLK_PERI_PWM5>,
88                 <&pericfg CLK_PERI_PWM6>, <&pericfg CLK_PERI_PWM7>;
89        clock-names = "top", "main",
90                      "pwm1", "pwm2",
91                      "pwm3", "pwm4",
92                      "pwm5", "pwm6",
93                      "pwm7", "pwm8";
94    };
95