1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung SoC PWM timers
8
9maintainers:
10  - Thierry Reding <thierry.reding@gmail.com>
11  - Krzysztof Kozlowski <krzk@kernel.org>
12
13description: |+
14  Samsung SoCs contain PWM timer blocks which can be used for system clock source
15  and clock event timers, as well as to drive SoC outputs with PWM signal. Each
16  PWM timer block provides 5 PWM channels (not all of them can drive physical
17  outputs - see SoC and board manual).
18
19  Be aware that the clocksource driver supports only uniprocessor systems.
20
21properties:
22  compatible:
23    oneOf:
24      - enum:
25          - samsung,s3c2410-pwm             # 16-bit, S3C24xx
26          - samsung,s3c6400-pwm             # 32-bit, S3C64xx
27          - samsung,s5p6440-pwm             # 32-bit, S5P64x0
28          - samsung,s5pc100-pwm             # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs
29          - samsung,exynos4210-pwm          # 32-bit, Exynos
30      - items:
31          - enum:
32              - samsung,exynosautov9-pwm
33          - const: samsung,exynos4210-pwm
34
35  reg:
36    maxItems: 1
37
38  clocks:
39    minItems: 1
40    maxItems: 3
41
42  clock-names:
43    description: |
44      Should contain all following required clock names:
45      - "timers" - PWM base clock used to generate PWM signals,
46      and any subset of following optional clock names:
47      - "pwm-tclk0" - first external PWM clock source,
48      - "pwm-tclk1" - second external PWM clock source.
49      Note that not all IP variants allow using all external clock sources.
50      Refer to SoC documentation to learn which clock source configurations
51      are available.
52    oneOf:
53      - items:
54          - const: timers
55      - items:
56          - const: timers
57          - const: pwm-tclk0
58      - items:
59          - const: timers
60          - const: pwm-tclk1
61      - items:
62          - const: timers
63          - const: pwm-tclk0
64          - const: pwm-tclk1
65
66  interrupts:
67    description:
68      One interrupt per timer, starting at timer 0. Necessary only for SoCs which
69      use PWM clocksource.
70    minItems: 1
71    maxItems: 5
72
73  "#pwm-cells":
74    description:
75      The only third cell flag supported by this binding
76      is PWM_POLARITY_INVERTED.
77    const: 3
78
79  samsung,pwm-outputs:
80    description:
81      A list of PWM channels used as PWM outputs on particular platform.
82      It is an array of up to 5 elements being indices of PWM channels
83      (from 0 to 4), the order does not matter.
84    $ref: /schemas/types.yaml#/definitions/uint32-array
85    uniqueItems: true
86    items:
87      minimum: 0
88      maximum: 4
89
90required:
91  - clocks
92  - clock-names
93  - compatible
94  - reg
95
96additionalProperties: false
97
98allOf:
99  - $ref: pwm.yaml#
100
101  - if:
102      properties:
103        compatible:
104          contains:
105            enum:
106              - samsung,s3c2410-pwm
107              - samsung,s3c6400-pwm
108              - samsung,s5p6440-pwm
109              - samsung,s5pc100-pwm
110    then:
111      required:
112        - interrupts
113
114examples:
115  - |
116    pwm@7f006000 {
117        compatible = "samsung,s3c6400-pwm";
118        reg = <0x7f006000 0x1000>;
119        interrupt-parent = <&vic0>;
120        interrupts = <23>, <24>, <25>, <27>, <28>;
121        clocks = <&clock 67>;
122        clock-names = "timers";
123        samsung,pwm-outputs = <0>, <1>;
124        #pwm-cells = <3>;
125    };
126