1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/regulator/anatop-regulator.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Anatop Voltage Regulators
8
9maintainers:
10  - Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
11
12allOf:
13  - $ref: "regulator.yaml#"
14
15properties:
16  compatible:
17    const: fsl,anatop-regulator
18
19  regulator-name: true
20
21  anatop-reg-offset:
22    $ref: '/schemas/types.yaml#/definitions/uint32'
23    description: u32 value representing the anatop MFD register offset.
24
25  anatop-vol-bit-shift:
26    $ref: '/schemas/types.yaml#/definitions/uint32'
27    description: u32 value representing the bit shift for the register.
28
29  anatop-vol-bit-width:
30    $ref: '/schemas/types.yaml#/definitions/uint32'
31    description: u32 value representing the number of bits used in the register.
32
33  anatop-min-bit-val:
34    $ref: '/schemas/types.yaml#/definitions/uint32'
35    description: u32 value representing the minimum value of this register.
36
37  anatop-min-voltage:
38    $ref: '/schemas/types.yaml#/definitions/uint32'
39    description: u32 value representing the minimum voltage of this regulator.
40
41  anatop-max-voltage:
42    $ref: '/schemas/types.yaml#/definitions/uint32'
43    description: u32 value representing the maximum voltage of this regulator.
44
45  anatop-delay-reg-offset:
46    $ref: '/schemas/types.yaml#/definitions/uint32'
47    description: u32 value representing the anatop MFD step time register offset.
48
49  anatop-delay-bit-shift:
50    $ref: '/schemas/types.yaml#/definitions/uint32'
51    description: u32 value representing the bit shift for the step time register.
52
53  anatop-delay-bit-width:
54    $ref: '/schemas/types.yaml#/definitions/uint32'
55    description: u32 value representing the number of bits used in the step time register.
56
57  anatop-enable-bit:
58    $ref: '/schemas/types.yaml#/definitions/uint32'
59    description: u32 value representing regulator enable bit offset.
60
61  vin-supply:
62    description: input supply phandle.
63
64required:
65  - compatible
66  - regulator-name
67  - anatop-reg-offset
68  - anatop-vol-bit-shift
69  - anatop-vol-bit-width
70  - anatop-min-bit-val
71  - anatop-min-voltage
72  - anatop-max-voltage
73
74unevaluatedProperties: false
75
76examples:
77  - |
78    regulator-vddpu {
79        compatible = "fsl,anatop-regulator";
80        regulator-name = "vddpu";
81        regulator-min-microvolt = <725000>;
82        regulator-max-microvolt = <1300000>;
83        regulator-always-on;
84        anatop-reg-offset = <0x140>;
85        anatop-vol-bit-shift = <9>;
86        anatop-vol-bit-width = <5>;
87        anatop-delay-reg-offset = <0x170>;
88        anatop-delay-bit-shift = <24>;
89        anatop-delay-bit-width = <2>;
90        anatop-min-bit-val = <1>;
91        anatop-min-voltage = <725000>;
92        anatop-max-voltage = <1300000>;
93    };
94