1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX System Reset Controller
8
9maintainers:
10  - Philipp Zabel <p.zabel@pengutronix.de>
11
12description: |
13  The system reset controller can be used to reset the GPU, VPU,
14  IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
15  nodes should specify the reset line on the SRC in their resets
16  property, containing a phandle to the SRC device node and a
17  RESET_INDEX specifying which module to reset, as described in
18  reset.txt
19
20  The following RESET_INDEX values are valid for i.MX5:
21    GPU_RESET     0
22    VPU_RESET     1
23    IPU1_RESET    2
24    OPEN_VG_RESET 3
25  The following additional RESET_INDEX value is valid for i.MX6:
26    IPU2_RESET    4
27
28properties:
29  compatible:
30    oneOf:
31      - const: "fsl,imx51-src"
32      - items:
33          - const: "fsl,imx50-src"
34          - const: "fsl,imx51-src"
35      - items:
36          - const: "fsl,imx53-src"
37          - const: "fsl,imx51-src"
38      - items:
39          - const: "fsl,imx6q-src"
40          - const: "fsl,imx51-src"
41      - items:
42          - const: "fsl,imx6sx-src"
43          - const: "fsl,imx51-src"
44      - items:
45          - const: "fsl,imx6sl-src"
46          - const: "fsl,imx51-src"
47      - items:
48          - const: "fsl,imx6ul-src"
49          - const: "fsl,imx51-src"
50      - items:
51          - const: "fsl,imx6sll-src"
52          - const: "fsl,imx51-src"
53
54  reg:
55    maxItems: 1
56
57  interrupts:
58    items:
59      - description: SRC interrupt
60      - description: CPU WDOG interrupts out of SRC
61    minItems: 1
62
63  '#reset-cells':
64    const: 1
65
66required:
67  - compatible
68  - reg
69  - interrupts
70  - '#reset-cells'
71
72additionalProperties: false
73
74examples:
75  - |
76    reset-controller@73fd0000 {
77        compatible = "fsl,imx51-src";
78        reg = <0x73fd0000 0x4000>;
79        interrupts = <75>;
80        #reset-cells = <1>;
81    };
82