1Pistachio Reset Controller
2=============================================================================
3
4This binding describes a reset controller device that is used to enable and
5disable individual IP blocks within the Pistachio SoC using "soft reset"
6control bits found in the Pistachio SoC top level registers.
7
8The actual action taken when soft reset is asserted is hardware dependent.
9However, when asserted it may not be possible to access the hardware's
10registers, and following an assert/deassert sequence the hardware's previous
11state may no longer be valid.
12
13Please refer to Documentation/devicetree/bindings/reset/reset.txt
14for common reset controller binding usage.
15
16Required properties:
17
18- compatible: Contains "img,pistachio-reset"
19
20- #reset-cells: Contains 1
21
22Example:
23
24	cr_periph: clk@18148000 {
25		compatible = "img,pistachio-cr-periph", "syscon", "simple-mfd";
26		reg = <0x18148000 0x1000>;
27		clocks = <&clk_periph PERIPH_CLK_SYS>;
28		clock-names = "sys";
29		#clock-cells = <1>;
30
31		pistachio_reset: reset-controller {
32			compatible = "img,pistachio-reset";
33			#reset-cells = <1>;
34		};
35	};
36
37Specifying reset control of devices
38=======================================
39
40Device nodes should specify the reset channel required in their "resets"
41property, containing a phandle to the pistachio reset device node and an
42index specifying which reset to use, as described in
43Documentation/devicetree/bindings/reset/reset.txt.
44
45Example:
46
47	spdif_out: spdif-out@18100d00 {
48		...
49		resets = <&pistachio_reset PISTACHIO_RESET_SPDIF_OUT>;
50		reset-names = "rst";
51		...
52	};
53
54Macro definitions for the supported resets can be found in:
55include/dt-bindings/reset/pistachio-resets.h
56