1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare ABP UART
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12allOf:
13  - $ref: serial.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - renesas,r9a06g032-uart
21              - renesas,r9a06g033-uart
22          - const: renesas,rzn1-uart
23      - items:
24          - enum:
25              - rockchip,px30-uart
26              - rockchip,rk1808-uart
27              - rockchip,rk3036-uart
28              - rockchip,rk3066-uart
29              - rockchip,rk3128-uart
30              - rockchip,rk3188-uart
31              - rockchip,rk3288-uart
32              - rockchip,rk3308-uart
33              - rockchip,rk3328-uart
34              - rockchip,rk3368-uart
35              - rockchip,rk3399-uart
36              - rockchip,rk3568-uart
37              - rockchip,rk3588-uart
38              - rockchip,rv1108-uart
39              - rockchip,rv1126-uart
40          - const: snps,dw-apb-uart
41      - items:
42          - enum:
43              - brcm,bcm11351-dw-apb-uart
44              - brcm,bcm21664-dw-apb-uart
45          - const: snps,dw-apb-uart
46      - items:
47          - enum:
48              - starfive,jh7100-hsuart
49              - starfive,jh7100-uart
50          - const: snps,dw-apb-uart
51      - const: snps,dw-apb-uart
52
53  reg:
54    maxItems: 1
55
56  interrupts:
57    maxItems: 1
58
59  clock-frequency: true
60
61  clocks:
62    minItems: 1
63    maxItems: 2
64
65  clock-names:
66    items:
67      - const: baudclk
68      - const: apb_pclk
69
70  dmas:
71    maxItems: 2
72
73  dma-names:
74    items:
75      - const: tx
76      - const: rx
77
78  snps,uart-16550-compatible:
79    description: reflects the value of UART_16550_COMPATIBLE configuration
80      parameter. Define this if your UART does not implement the busy functionality.
81    type: boolean
82
83  resets:
84    maxItems: 1
85
86  reg-shift: true
87
88  reg-io-width: true
89
90  dcd-override:
91    description: Override the DCD modem status signal. This signal will
92      always be reported as active instead of being obtained from the modem
93      status register. Define this if your serial port does not use this
94      pin.
95    type: boolean
96
97  dsr-override:
98    description: Override the DTS modem status signal. This signal will
99      always be reported as active instead of being obtained from the modem
100      status register. Define this if your serial port does not use this
101      pin.
102    type: boolean
103
104  cts-override:
105    description: Override the CTS modem status signal. This signal will
106      always be reported as active instead of being obtained from the modem
107      status register. Define this if your serial port does not use this
108      pin.
109    type: boolean
110
111  ri-override:
112    description: Override the RI modem status signal. This signal will always
113      be reported as inactive instead of being obtained from the modem status
114      register. Define this if your serial port does not use this pin.
115    type: boolean
116
117required:
118  - compatible
119  - reg
120
121unevaluatedProperties: false
122
123examples:
124  - |
125    serial@80230000 {
126      compatible = "snps,dw-apb-uart";
127      reg = <0x80230000 0x100>;
128      clock-frequency = <3686400>;
129      interrupts = <10>;
130      reg-shift = <2>;
131      reg-io-width = <4>;
132      dcd-override;
133      dsr-override;
134      cts-override;
135      ri-override;
136    };
137
138  - |
139    // Example with one clock:
140    serial@80230000 {
141      compatible = "snps,dw-apb-uart";
142      reg = <0x80230000 0x100>;
143      clocks = <&baudclk>;
144      interrupts = <10>;
145      reg-shift = <2>;
146      reg-io-width = <4>;
147    };
148
149  - |
150    // Example with two clocks:
151    serial@80230000 {
152      compatible = "snps,dw-apb-uart";
153      reg = <0x80230000 0x100>;
154      clocks = <&baudclk>, <&apb_pclk>;
155      clock-names = "baudclk", "apb_pclk";
156      interrupts = <10>;
157      reg-shift = <2>;
158      reg-io-width = <4>;
159    };
160...
161