1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek PMIC Wrapper
8
9maintainers:
10  - Flora Fu <flora.fu@mediatek.com>
11  - Alexandre Mergnat <amergnat@baylibre.com>
12
13description:
14  On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
15  is not directly visible to the CPU, but only through the PMIC wrapper
16  inside the SoC. The communication between the SoC and the PMIC can
17  optionally be encrypted. Also a non standard Dual IO SPI mode can be
18  used to increase speed.
19
20  IP Pairing
21
22  On MT8135 the pins of some SoC internal peripherals can be on the PMIC.
23  The signals of these pins are routed over the SPI bus using the pwrap
24  bridge. In the binding description below the properties needed for bridging
25  are marked with "IP Pairing". These are optional on SoCs which do not support
26  IP Pairing
27
28properties:
29  compatible:
30    oneOf:
31      - items:
32          - enum:
33              - mediatek,mt2701-pwrap
34              - mediatek,mt6765-pwrap
35              - mediatek,mt6779-pwrap
36              - mediatek,mt6795-pwrap
37              - mediatek,mt6797-pwrap
38              - mediatek,mt6873-pwrap
39              - mediatek,mt7622-pwrap
40              - mediatek,mt8135-pwrap
41              - mediatek,mt8173-pwrap
42              - mediatek,mt8183-pwrap
43              - mediatek,mt8186-pwrap
44              - mediatek,mt8188-pwrap
45              - mediatek,mt8195-pwrap
46              - mediatek,mt8365-pwrap
47              - mediatek,mt8516-pwrap
48      - items:
49          - enum:
50              - mediatek,mt8186-pwrap
51              - mediatek,mt8195-pwrap
52          - const: syscon
53
54  reg:
55    minItems: 1
56    items:
57      - description: PMIC wrapper registers
58      - description: IP pairing registers
59
60  reg-names:
61    minItems: 1
62    items:
63      - const: pwrap
64      - const: pwrap-bridge
65
66  interrupts:
67    maxItems: 1
68
69  clocks:
70    minItems: 2
71    items:
72      - description: SPI bus clock
73      - description: Main module clock
74      - description: System module clock
75      - description: Timer module clock
76
77  clock-names:
78    minItems: 2
79    items:
80      - const: spi
81      - const: wrap
82      - const: sys
83      - const: tmr
84
85  resets:
86    minItems: 1
87    items:
88      - description: PMIC wrapper reset
89      - description: IP pairing reset
90
91  reset-names:
92    minItems: 1
93    items:
94      - const: pwrap
95      - const: pwrap-bridge
96
97  pmic:
98    type: object
99
100required:
101  - compatible
102  - reg
103  - reg-names
104  - interrupts
105  - clocks
106  - clock-names
107
108dependentRequired:
109  resets: [reset-names]
110
111allOf:
112  - if:
113      properties:
114        compatible:
115          contains:
116            const: mediatek,mt8365-pwrap
117    then:
118      properties:
119        clocks:
120          minItems: 4
121
122        clock-names:
123          minItems: 4
124
125additionalProperties: false
126
127examples:
128  - |
129    #include <dt-bindings/interrupt-controller/irq.h>
130    #include <dt-bindings/interrupt-controller/arm-gic.h>
131    #include <dt-bindings/reset/mt8135-resets.h>
132
133    soc {
134        #address-cells = <2>;
135        #size-cells = <2>;
136        pwrap@1000f000 {
137            compatible = "mediatek,mt8135-pwrap";
138            reg = <0 0x1000f000 0 0x1000>,
139                  <0 0x11017000 0 0x1000>;
140            reg-names = "pwrap", "pwrap-bridge";
141            interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
142            clocks = <&clk26m>, <&clk26m>;
143            clock-names = "spi", "wrap";
144            resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>,
145                     <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>;
146            reset-names = "pwrap", "pwrap-bridge";
147        };
148    };
149