1* Freescale SGTL5000 Stereo Codec
2
3Required properties:
4- compatible : "fsl,sgtl5000".
5
6- reg : the I2C address of the device
7
8- #sound-dai-cells: must be equal to 0
9
10- clocks : the clock provider of SYS_MCLK
11
12- VDDA-supply : the regulator provider of VDDA
13
14- VDDIO-supply: the regulator provider of VDDIO
15
16Optional properties:
17
18- VDDD-supply : the regulator provider of VDDD
19
20- micbias-resistor-k-ohms : the bias resistor to be used in kOhms
21	The resistor can take values of 2k, 4k or 8k.
22	If set to 0 it will be off.
23	If this node is not mentioned or if the value is unknown, then
24	micbias	resistor is set to 4K.
25
26- micbias-voltage-m-volts : the bias voltage to be used in mVolts
27	The voltage can take values from 1.25V to 3V by 250mV steps
28	If this node is not mentioned or the value is unknown, then
29	the value is set to 1.25V.
30
31- lrclk-strength: the LRCLK pad strength. Possible values are:
320, 1, 2 and 3 as per the table below:
33
34VDDIO		1.8V		2.5V		3.3V
350 = 		Disable
361 =		1.66 mA		2.87 mA		4.02  mA
372 =		3.33 mA		5.74 mA		8.03  mA
383 =		4.99 mA		8.61 mA		12.05 mA
39
40- sclk-strength: the SCLK pad strength. Possible values are:
410, 1, 2 and 3 as per the table below:
42
43VDDIO		1.8V		2.5V		3.3V
440 = 		Disable
451 =		1.66 mA		2.87 mA		4.02  mA
462 =		3.33 mA		5.74 mA		8.03  mA
473 =		4.99 mA		8.61 mA		12.05 mA
48
49Example:
50
51sgtl5000: codec@a {
52	compatible = "fsl,sgtl5000";
53	reg = <0x0a>;
54	#sound-dai-cells = <0>;
55	clocks = <&clks 150>;
56	micbias-resistor-k-ohms = <2>;
57	micbias-voltage-m-volts = <2250>;
58	VDDA-supply = <&reg_3p3v>;
59	VDDIO-supply = <&reg_3p3v>;
60};
61