1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2020 Texas Instruments Incorporated
3# Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
4%YAML 1.2
5---
6$id: http://devicetree.org/schemas/sound/ti,j721e-cpb-audio.yaml#
7$schema: http://devicetree.org/meta-schemas/core.yaml#
8
9title: Texas Instruments J721e Common Processor Board Audio Support
10
11maintainers:
12  - Peter Ujfalusi <peter.ujfalusi@gmail.com>
13
14description: |
15  The audio support on the board is using pcm3168a codec connected to McASP10
16  serializers in parallel setup.
17  The pcm3168a SCKI clock is sourced from j721e AUDIO_REFCLK2 pin.
18  In order to support 48KHz and 44.1KHz family of sampling rates the parent
19  clock for AUDIO_REFCLK2 needs to be changed between PLL4 (for 48KHz) and
20  PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via
21  different HSDIVIDER.
22
23  Clocking setup for j721e:
24    48KHz family:
25    PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
26          |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2  ---> pcm3168a.SCKI
27
28    44.1KHz family:
29    PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
30           |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2  ---> pcm3168a.SCKI
31
32  Clocking setup for j7200:
33    48KHz family:
34    PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk
35          |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2  ---> pcm3168a.SCKI
36
37properties:
38  compatible:
39    enum:
40      - ti,j721e-cpb-audio
41      - ti,j7200-cpb-audio
42
43  model:
44    $ref: /schemas/types.yaml#/definitions/string
45    description: User specified audio sound card name
46
47  ti,cpb-mcasp:
48    description: phandle to McASP used on CPB
49    $ref: /schemas/types.yaml#/definitions/phandle
50
51  ti,cpb-codec:
52    description: phandle to the pcm3168a codec used on the CPB
53    $ref: /schemas/types.yaml#/definitions/phandle
54
55  clocks:
56    minItems: 4
57    maxItems: 6
58
59  clock-names:
60    minItems: 4
61    maxItems: 6
62
63required:
64  - compatible
65  - model
66  - ti,cpb-mcasp
67  - ti,cpb-codec
68  - clocks
69  - clock-names
70
71additionalProperties: false
72
73allOf:
74  - if:
75      properties:
76        compatible:
77          contains:
78            const: ti,j721e-cpb-audio
79
80    then:
81      properties:
82        clocks:
83          minItems: 6
84          items:
85            - description: AUXCLK clock for McASP used by CPB audio
86            - description: Parent for CPB_McASP auxclk (for 48KHz)
87            - description: Parent for CPB_McASP auxclk (for 44.1KHz)
88            - description: SCKI clock for the pcm3168a codec on CPB
89            - description: Parent for CPB_SCKI clock (for 48KHz)
90            - description: Parent for CPB_SCKI clock (for 44.1KHz)
91
92        clock-names:
93          items:
94            - const: cpb-mcasp-auxclk
95            - const: cpb-mcasp-auxclk-48000
96            - const: cpb-mcasp-auxclk-44100
97            - const: cpb-codec-scki
98            - const: cpb-codec-scki-48000
99            - const: cpb-codec-scki-44100
100
101  - if:
102      properties:
103        compatible:
104          contains:
105            const: ti,j7200-cpb-audio
106
107    then:
108      properties:
109        clocks:
110          maxItems: 4
111          items:
112            - description: AUXCLK clock for McASP used by CPB audio
113            - description: Parent for CPB_McASP auxclk (for 48KHz)
114            - description: SCKI clock for the pcm3168a codec on CPB
115            - description: Parent for CPB_SCKI clock (for 48KHz)
116
117        clock-names:
118          items:
119            - const: cpb-mcasp-auxclk
120            - const: cpb-mcasp-auxclk-48000
121            - const: cpb-codec-scki
122            - const: cpb-codec-scki-48000
123
124examples:
125  - |+
126    sound {
127        compatible = "ti,j721e-cpb-audio";
128        model = "j721e-cpb";
129
130        status = "okay";
131
132        ti,cpb-mcasp = <&mcasp10>;
133        ti,cpb-codec = <&pcm3168a_1>;
134
135        clocks = <&k3_clks 184 1>,
136                 <&k3_clks 184 2>, <&k3_clks 184 4>,
137                 <&k3_clks 157 371>,
138                 <&k3_clks 157 400>, <&k3_clks 157 401>;
139        clock-names = "cpb-mcasp-auxclk",
140                      "cpb-mcasp-auxclk-48000", "cpb-mcasp-auxclk-44100",
141                      "cpb-codec-scki",
142                      "cpb-codec-scki-48000", "cpb-codec-scki-44100";
143    };
144