1*aa1a8ff2SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*aa1a8ff2SEmmanuel Vadot%YAML 1.2
3*aa1a8ff2SEmmanuel Vadot---
4*aa1a8ff2SEmmanuel Vadot$id: http://devicetree.org/schemas/spi/nvidia,tegra114-spi.yaml#
5*aa1a8ff2SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*aa1a8ff2SEmmanuel Vadot
7*aa1a8ff2SEmmanuel Vadottitle: NVIDIA Tegra114 SPI controller
8*aa1a8ff2SEmmanuel Vadot
9*aa1a8ff2SEmmanuel Vadotmaintainers:
10*aa1a8ff2SEmmanuel Vadot  - Thierry Reding <thierry.reding@gmail.com>
11*aa1a8ff2SEmmanuel Vadot  - Jon Hunter <jonathanh@nvidia.com>
12*aa1a8ff2SEmmanuel Vadot
13*aa1a8ff2SEmmanuel Vadotproperties:
14*aa1a8ff2SEmmanuel Vadot  compatible:
15*aa1a8ff2SEmmanuel Vadot    oneOf:
16*aa1a8ff2SEmmanuel Vadot      - const: nvidia,tegra114-spi
17*aa1a8ff2SEmmanuel Vadot      - items:
18*aa1a8ff2SEmmanuel Vadot          - enum:
19*aa1a8ff2SEmmanuel Vadot              - nvidia,tegra210-spi
20*aa1a8ff2SEmmanuel Vadot              - nvidia,tegra124-spi
21*aa1a8ff2SEmmanuel Vadot          - const: nvidia,tegra114-spi
22*aa1a8ff2SEmmanuel Vadot
23*aa1a8ff2SEmmanuel Vadot  reg:
24*aa1a8ff2SEmmanuel Vadot    maxItems: 1
25*aa1a8ff2SEmmanuel Vadot
26*aa1a8ff2SEmmanuel Vadot  interrupts:
27*aa1a8ff2SEmmanuel Vadot    maxItems: 1
28*aa1a8ff2SEmmanuel Vadot
29*aa1a8ff2SEmmanuel Vadot  clocks:
30*aa1a8ff2SEmmanuel Vadot    items:
31*aa1a8ff2SEmmanuel Vadot      - description: SPI module clock
32*aa1a8ff2SEmmanuel Vadot
33*aa1a8ff2SEmmanuel Vadot  clock-names:
34*aa1a8ff2SEmmanuel Vadot    items:
35*aa1a8ff2SEmmanuel Vadot      - const: spi
36*aa1a8ff2SEmmanuel Vadot
37*aa1a8ff2SEmmanuel Vadot  resets:
38*aa1a8ff2SEmmanuel Vadot    items:
39*aa1a8ff2SEmmanuel Vadot      - description: SPI module reset
40*aa1a8ff2SEmmanuel Vadot
41*aa1a8ff2SEmmanuel Vadot  reset-names:
42*aa1a8ff2SEmmanuel Vadot    items:
43*aa1a8ff2SEmmanuel Vadot      - const: spi
44*aa1a8ff2SEmmanuel Vadot
45*aa1a8ff2SEmmanuel Vadot  dmas:
46*aa1a8ff2SEmmanuel Vadot    items:
47*aa1a8ff2SEmmanuel Vadot      - description: DMA channel for the reception FIFO
48*aa1a8ff2SEmmanuel Vadot      - description: DMA channel for the transmission FIFO
49*aa1a8ff2SEmmanuel Vadot
50*aa1a8ff2SEmmanuel Vadot  dma-names:
51*aa1a8ff2SEmmanuel Vadot    items:
52*aa1a8ff2SEmmanuel Vadot      - const: rx
53*aa1a8ff2SEmmanuel Vadot      - const: tx
54*aa1a8ff2SEmmanuel Vadot
55*aa1a8ff2SEmmanuel Vadot  spi-max-frequency:
56*aa1a8ff2SEmmanuel Vadot    description: Maximum SPI clocking speed of the controller in Hz.
57*aa1a8ff2SEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32
58*aa1a8ff2SEmmanuel Vadot
59*aa1a8ff2SEmmanuel VadotallOf:
60*aa1a8ff2SEmmanuel Vadot  - $ref: spi-controller.yaml
61*aa1a8ff2SEmmanuel Vadot
62*aa1a8ff2SEmmanuel VadotunevaluatedProperties: false
63*aa1a8ff2SEmmanuel Vadot
64*aa1a8ff2SEmmanuel Vadotrequired:
65*aa1a8ff2SEmmanuel Vadot  - compatible
66*aa1a8ff2SEmmanuel Vadot  - reg
67*aa1a8ff2SEmmanuel Vadot  - interrupts
68*aa1a8ff2SEmmanuel Vadot  - clocks
69*aa1a8ff2SEmmanuel Vadot  - clock-names
70*aa1a8ff2SEmmanuel Vadot  - resets
71*aa1a8ff2SEmmanuel Vadot  - reset-names
72*aa1a8ff2SEmmanuel Vadot  - dmas
73*aa1a8ff2SEmmanuel Vadot  - dma-names
74*aa1a8ff2SEmmanuel Vadot
75*aa1a8ff2SEmmanuel Vadotexamples:
76*aa1a8ff2SEmmanuel Vadot  - |
77*aa1a8ff2SEmmanuel Vadot    spi@7000d600 {
78*aa1a8ff2SEmmanuel Vadot        compatible = "nvidia,tegra114-spi";
79*aa1a8ff2SEmmanuel Vadot        reg = <0x7000d600 0x200>;
80*aa1a8ff2SEmmanuel Vadot        interrupts = <0 82 0x04>;
81*aa1a8ff2SEmmanuel Vadot        clocks = <&tegra_car 44>;
82*aa1a8ff2SEmmanuel Vadot        clock-names = "spi";
83*aa1a8ff2SEmmanuel Vadot        resets = <&tegra_car 44>;
84*aa1a8ff2SEmmanuel Vadot        reset-names = "spi";
85*aa1a8ff2SEmmanuel Vadot        dmas = <&apbdma 16>, <&apbdma 16>;
86*aa1a8ff2SEmmanuel Vadot        dma-names = "rx", "tx";
87*aa1a8ff2SEmmanuel Vadot
88*aa1a8ff2SEmmanuel Vadot        spi-max-frequency = <25000000>;
89*aa1a8ff2SEmmanuel Vadot
90*aa1a8ff2SEmmanuel Vadot        #address-cells = <1>;
91*aa1a8ff2SEmmanuel Vadot        #size-cells = <0>;
92*aa1a8ff2SEmmanuel Vadot
93*aa1a8ff2SEmmanuel Vadot        flash@0 {
94*aa1a8ff2SEmmanuel Vadot            compatible = "jedec,spi-nor";
95*aa1a8ff2SEmmanuel Vadot            reg = <0>;
96*aa1a8ff2SEmmanuel Vadot            spi-max-frequency = <20000000>;
97*aa1a8ff2SEmmanuel Vadot            nvidia,rx-clk-tap-delay = <0>;
98*aa1a8ff2SEmmanuel Vadot            nvidia,tx-clk-tap-delay = <16>;
99*aa1a8ff2SEmmanuel Vadot        };
100*aa1a8ff2SEmmanuel Vadot    };
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