1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Tegra Quad SPI Controller
8
9maintainers:
10  - Thierry Reding <thierry.reding@gmail.com>
11  - Jonathan Hunter <jonathanh@nvidia.com>
12
13allOf:
14  - $ref: spi-controller.yaml#
15
16properties:
17  compatible:
18    enum:
19      - nvidia,tegra210-qspi
20      - nvidia,tegra186-qspi
21      - nvidia,tegra194-qspi
22      - nvidia,tegra234-qspi
23      - nvidia,tegra241-qspi
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    maxItems: 1
30
31  clock-names:
32    items:
33      - const: qspi
34      - const: qspi_out
35
36  clocks:
37    maxItems: 2
38
39  resets:
40    maxItems: 1
41
42  dmas:
43    maxItems: 2
44
45  dma-names:
46    items:
47      - const: rx
48      - const: tx
49
50patternProperties:
51  "@[0-9a-f]+$":
52    type: object
53
54    properties:
55      spi-rx-bus-width:
56        enum: [1, 2, 4]
57
58      spi-tx-bus-width:
59        enum: [1, 2, 4]
60
61required:
62  - compatible
63  - reg
64  - interrupts
65  - clock-names
66  - clocks
67  - resets
68
69unevaluatedProperties: false
70
71examples:
72  - |
73    #include <dt-bindings/clock/tegra210-car.h>
74    #include <dt-bindings/reset/tegra210-car.h>
75    #include <dt-bindings/interrupt-controller/arm-gic.h>
76    spi@70410000 {
77        compatible = "nvidia,tegra210-qspi";
78        reg = <0x70410000 0x1000>;
79        interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
80        #address-cells = <1>;
81        #size-cells = <0>;
82        clocks = <&tegra_car TEGRA210_CLK_QSPI>,
83                 <&tegra_car TEGRA210_CLK_QSPI_PM>;
84        clock-names = "qspi", "qspi_out";
85        resets = <&tegra_car 211>;
86        dmas = <&apbdma 5>, <&apbdma 5>;
87        dma-names = "rx", "tx";
88
89        flash@0 {
90            compatible = "jedec,spi-nor";
91            reg = <0>;
92            spi-max-frequency = <104000000>;
93            spi-tx-bus-width = <2>;
94            spi-rx-bus-width = <2>;
95            nvidia,tx-clk-tap-delay = <0>;
96            nvidia,rx-clk-tap-delay = <0>;
97        };
98    };
99