1* Samsung SPI Controller
2
3The Samsung SPI controller is used to interface with various devices such as flash
4and display controllers using the SPI communication interface.
5
6Required SoC Specific Properties:
7
8- compatible: should be one of the following.
9    - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
10    - samsung,s3c6410-spi: for s3c6410 platforms
11    - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
12    - samsung,exynos5433-spi: for exynos5433 compatible controllers
13    - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED>
14
15- reg: physical base address of the controller and length of memory mapped
16  region.
17
18- interrupts: The interrupt number to the cpu. The interrupt specifier format
19  depends on the interrupt controller.
20
21- dmas : Two or more DMA channel specifiers following the convention outlined
22  in bindings/dma/dma.txt
23
24- dma-names: Names for the dma channels. There must be at least one channel
25  named "tx" for transmit and named "rx" for receive.
26
27- clocks: specifies the clock IDs provided to the SPI controller; they are
28  required for interacting with the controller itself, for synchronizing the bus
29  and as I/O clock (the latter is required by exynos5433 and exynos7).
30
31- clock-names: string names of the clocks in the 'clocks' property; for all the
32  the devices the names must be "spi", "spi_busclkN" (where N is determined by
33  "samsung,spi-src-clk"), while Exynos5433 should specify a third clock
34  "spi_ioclk" for the I/O clock.
35
36Required Board Specific Properties:
37
38- #address-cells: should be 1.
39- #size-cells: should be 0.
40
41Optional Board Specific Properties:
42
43- samsung,spi-src-clk: If the spi controller includes a internal clock mux to
44  select the clock source for the spi bus clock, this property can be used to
45  indicate the clock to be used for driving the spi bus clock. If not specified,
46  the clock number 0 is used as default.
47
48- num-cs: Specifies the number of chip select lines supported. If
49  not specified, the default number of chip select lines is set to 1.
50
51- cs-gpios: should specify GPIOs used for chipselects (see spi-bus.txt)
52
53- no-cs-readback: the CS line is disconnected, therefore the device should not
54  operate based on CS signalling.
55
56SPI Controller specific data in SPI slave nodes:
57
58- The spi slave nodes should provide the following information which is required
59  by the spi controller.
60
61  - samsung,spi-feedback-delay: The sampling phase shift to be applied on the
62    miso line (to account for any lag in the miso line). The following are the
63    valid values.
64
65      - 0: No phase shift.
66      - 1: 90 degree phase shift sampling.
67      - 2: 180 degree phase shift sampling.
68      - 3: 270 degree phase shift sampling.
69
70Aliases:
71
72- All the SPI controller nodes should be represented in the aliases node using
73  the following format 'spi{n}' where n is a unique number for the alias.
74
75
76Example:
77
78- SoC Specific Portion:
79
80	spi_0: spi@12d20000 {
81		compatible = "samsung,exynos4210-spi";
82		reg = <0x12d20000 0x100>;
83		interrupts = <0 66 0>;
84		dmas = <&pdma0 5
85			&pdma0 4>;
86		dma-names = "tx", "rx";
87		#address-cells = <1>;
88		#size-cells = <0>;
89	};
90
91- Board Specific Portion:
92
93	spi_0: spi@12d20000 {
94		#address-cells = <1>;
95		#size-cells = <0>;
96		pinctrl-names = "default";
97		pinctrl-0 = <&spi0_bus>;
98		cs-gpios = <&gpa2 5 0>;
99
100		w25q80bw@0 {
101			#address-cells = <1>;
102			#size-cells = <1>;
103			compatible = "w25x80";
104			reg = <0>;
105			spi-max-frequency = <10000>;
106
107			controller-data {
108				samsung,spi-feedback-delay = <0>;
109			};
110
111			partition@0 {
112				label = "U-Boot";
113				reg = <0x0 0x40000>;
114				read-only;
115			};
116
117			partition@40000 {
118				label = "Kernel";
119				reg = <0x40000 0xc0000>;
120			};
121		};
122	};
123